MAX64180
HD H.264 CODEC
Data Sheet
Revision 1.1: 06/04/12
Doc. No: 2001_DS
Confidential
Maxim Integrated Products
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Maxim Integrated Products
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www.maxim-ic.com
Copyright © 2012 Maxim Integrated Products
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MAX64180 Data Sheet
Contents
Contents
Revision History........................................................................................................... 13
1
Introduction ....................................................................................................... 15
1.1
1.2
1.3
1.4
Features ........................................................................................................................... 16
Applications ...................................................................................................................... 16
Additional Documentation................................................................................................. 16
Trademark Information ..................................................................................................... 17
2
General Description .......................................................................................... 19
2.1
2.2
Features ........................................................................................................................... 20
General Overview ............................................................................................................. 22
2.2.1 Video I/O Ports .................................................................................................... 22
2.2.2 Video Input Processor ......................................................................................... 22
2.2.3 Video Output Processor....................................................................................... 22
2.2.4 Video and Audio Multimedia Engines .................................................................. 23
2.2.5 Audio Interface..................................................................................................... 23
2.2.6 Memory Interface................................................................................................. 23
2.2.7 ARM Processor.................................................................................................... 23
2.2.8 AES and SHA Hardware Acceleration.................................................................24
Peripheral Interfaces ........................................................................................................ 24
2.3.1 USB 2.0 Interface ................................................................................................ 24
2.3.2 Serial Interfaces................................................................................................... 24
2.3
3
Functional Description ..................................................................................... 25
3.1
Video Subsystem.............................................................................................................. 26
3.1.1 Video Ports .......................................................................................................... 27
3.1.2 Video Control Signals .......................................................................................... 28
3.1.3 Video Clocks........................................................................................................ 29
3.1.4 Video I/O Power Domains ................................................................................... 29
3.1.5 Video Input Processor (VIP) ................................................................................ 30
3.1.6 Video Output Processor (VOP)............................................................................ 32
Audio Subsystem.............................................................................................................. 33
3.2.1 Audio Group Signals............................................................................................ 33
3.2.2 Audio Clocks........................................................................................................ 33
Encoder Subsystem ......................................................................................................... 34
Host Interface ................................................................................................................... 35
3.4.1 Host Interface Connections ................................................................................. 35
3.4.2 Host Interface Signals.......................................................................................... 36
Memory Interface.............................................................................................................. 37
3.5.1 DDR2 SDRAM Connections ................................................................................ 37
Serial Interfaces................................................................................................................ 38
3.6.1 UART Interface .................................................................................................... 38
3.6.2 Two-Wire (TWI) Interface..................................................................................... 39
3.6.3 SPI Interface ........................................................................................................ 39
3.6.4 Pulse Width Modulators....................................................................................... 40
3.6.4.1 Serial I/O Pad Programmable Features................................................. 40
3.2
3.3
3.4
3.5
3.6
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3.7
3.8
3.9
3.10
3.11
3.12
USB 2.0 High-Speed Interface ......................................................................................... 41
3.7.1 Physical Layer (PHY)........................................................................................... 42
3.7.2 USB Controller..................................................................................................... 44
High-Speed Bitstream....................................................................................................... 47
3.8.1 Bitstream Signals................................................................................................. 48
3.8.2 Bitstream Mode.................................................................................................... 48
3.8.3 Clock Plus Enable Mode...................................................................................... 49
Reset Logic...................................................................................................................... 50
3.9.1 Power-On Reset .................................................................................................. 50
3.9.2 Watchdog Reset .................................................................................................. 50
3.9.3 Software Chip Reset............................................................................................ 50
3.9.4 Reset Timing........................................................................................................ 51
Clocks and Phase Lock Loops (PLLs).............................................................................. 52
3.10.1 Clock and PLL inputs........................................................................................... 52
3.10.2 Phase Lock Loops ............................................................................................... 53
3.10.3 Video and Audio Clocks....................................................................................... 53
3.10.3.1 Video Input Clocks............................................................................... 54
3.10.3.2 Video Output Clocks ............................................................................ 54
3.10.3.3 Audio Clocks........................................................................................ 54
Device Configuration ........................................................................................................ 55
3.11.1 Reset ................................................................................................................... 55
3.11.2 Boot Mode for the MMEs and the ARM ............................................................... 55
3.11.3 API Configuration................................................................................................. 56
3.11.4 Pin Muxing ...........................................................................................................56
3.11.5 Debug Mode ........................................................................................................ 56
Oscillator Connections...................................................................................................... 56
3.12.1 Crystal Connected to USB_XIN and USB_XO Pins ............................................ 56
3.12.2 Crystal and External Clock Connected to External CLK_IN Pin .......................... 57
4
Power Supply Considerations ......................................................................... 59
4.1
4.2
Power Supply Sequencing ............................................................................................... 59
Power Supply ................................................................................................................... 60
5
Electrical Specifications................................................................................... 61
5.1
5.2
5.3
Operating Parameters ...................................................................................................... 61
DC Characteristics............................................................................................................ 62
AC Timing ......................................................................................................................... 63
5.3.1 Video Interface AC Timing ................................................................................... 64
5.3.2 Audio Interface AC Timing ................................................................................... 66
5.3.3 Host Interface AC Timing
68
5.3.4 DDR2 SDRAM Interface AC Timing .................................................................... 72
5.3.5 SPI/Bitstream Interface AC Timing ...................................................................... 72
6
Pin Definitions ................................................................................................... 81
6.1
6.2
6.3
6.4
MAX64180 Pin Configuration—248-Pin CTBGA .............................................................. 81
Signal Definitions .............................................................................................................. 86
Pin Identifications ............................................................................................................. 87
Pin Muxing ........................................................................................................................ 88
6.4.1 Audio Signal Group..............................................................................................90
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6.5
6.4.2 Video Port 0 Signal Group ................................................................................... 91
6.4.3 Video Port 2 Signal Group ................................................................................... 92
6.4.4 Host Signal Group ............................................................................................... 93
6.4.5 DDR2 SDRAM Signal Group ............................................................................... 94
6.4.6 USB Signal Group ............................................................................................... 96
6.4.7 UART Signal Group ............................................................................................. 96
6.4.8 SPI/Bitstream Signal Group................................................................................. 97
6.4.9 TWI Signal Group ................................................................................................ 97
6.4.10 PWM Signal Group ..............................................................................................98
6.4.11 GPIO Signal Group..............................................................................................98
6.4.12 JTAG Signal Group............................................................................................100
6.4.13 Configuration .....................................................................................................100
6.4.14 Clock..................................................................................................................101
6.4.15 Reset .................................................................................................................101
6.4.16 Power and Ground Pins.....................................................................................102
Pin List by Power Group .................................................................................................105
6.5.1
Hookup Recommendations when Interfaces are Unused ................................106
7
Package Information........................................................................................ 111
7.1
7.2
7.3
7.4
Package Outline—248-Pin CTBGA, 10mm × 10mm...................................................... 112
Package Diagram ........................................................................................................... 112
Thermal Data .................................................................................................................. 113
7.3.1 Thermal Resistance........................................................................................... 113
Marking ........................................................................................................................... 114
8
Ordering Information .......................................................................................115
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