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MAX5715AAUD+T

产品描述Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface
文件大小3MB,共27页
制造商Maxim(美信半导体)
官网地址https://www.maximintegrated.com/en.html
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MAX5715AAUD+T概述

Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface

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EVALUATION KIT AVAILABLE
MAX5713/MAX5714/MAX5715
Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and SPI Interface
General Description
The MAX5713/MAX5714/MAX5715 4-channel, low-power,
8-/10-/12-bit, voltage-output digital-to-analog converters
(DACs) include output buffers and an internal reference
that is selectable to be 2.048V, 2.500V, or 4.096V. The
MAX5713/MAX5714/MAX5715 accept a wide supply
voltage range of 2.7V to 5.5V with extremely low power
(3mW) consumption to accommodate most low-voltage
applications. A precision external reference input allows
rail-to-rail operation and presents a 100kI (typ) load to
an external reference.
The MAX5713/MAX5714/MAX5715 have a 50MHz 3-wire
SPI/QSPI™/MICROWIRE®/DSP-compatible serial interface
that also includes a
RDY
output for daisy-chain applica-
tions. The DAC output is buffered and has a low supply
current of less than 250FA per channel and a low off-
set error of
Q0.5mV
(typ). On power-up, the MAX5713/
MAX5714/MAX5715 reset the DAC outputs to zero, pro-
viding additional safety for applications that drive valves
or other transducers which need to be off on power-up.
The internal reference is initially powered down to allow
use of an external reference. The MAX5713/MAX5714/
MAX5715 allow simultaneous output updates using soft-
ware LOAD commands or the hardware load DAC logic
input (LDAC).
A clear logic input (CLR) allows the contents of the CODE
and the DAC registers to be cleared asynchronously and
sets the DAC outputs to zero. The MAX5713/MAX5714/
MAX5715 are available in a 14-pin TSSOP and an ultra-
small, 12-bump WLP package and are specified over the
-40NC to +125NC temperature range.
Benefits and Features
S
Four High-Accuracy DAC Channels
12-Bit Accuracy Without Adjustment
LSB INL Buffered Voltage Output
±1
Monotonic Over All Operating Conditions
Independent Mode Settings for Each DAC
S
Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
S
Internal Output Buffer
Rail-to-Rail Operation with External Reference
4.5µs Settling Time
Outputs Directly Drive 2kI Loads
S
Small 5mm x 4.4mm 14-Pin TSSOP or Ultra-Small
1.6mm x 2.2mm 12-Bump WLP Package
S
Wide 2.7V to 5.5V Supply Range
S
Separate 1.8V to 5.5V V
DDIO
Power-Supply Input
S
50MHz 3-Wire SPI/QSPI/MICROWIRE/DSP
Compatible Serial Interface with
RDY
Output
S
Power-On-Reset to Zero-Scale DAC Output
S
LDAC
and
CLR
For Asynchronous Control
S
Three Software-Selectable Power-Down Output
Impedances
1kI, 100kI, or High Impedance
Functional Diagram
V
DDIO
V
DD
REF
Applications
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
Data Acquisition
INTERNAL REFERENCE/
EXTERNAL BUFFER
CSB
SCLK
DIN
(RDY)
SPI SERIAL
INTERFACE
CODE
REGISTER
DAC
LATCH
8 -/10-/12-BIT
DAC
MAX5713
MAX5714
MAX5715
1 OF 4 DAC CHANNELS
BUFFER
OUTA
OUTB
OUTC
CLR
CODE
(LDAC)
CLEAR /
RESET
LOAD
CLEAR/
RESET
POWER-DOWN
100kI
1kI
OUTD
DAC CONTROL LOGIC
POR
GND
( ) TSSOP PACKAGE ONLY
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corporation.
Ordering Information
appears at end of data sheet.
For related parts and recommended products to use with this part,
refer to:
www.maximintegrated.com/MAX5713.related
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6394; Rev 3; 6/13

MAX5715AAUD+T相似产品对比

MAX5715AAUD+T MAX5713
描述 Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface Ultra-Small, Quad-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface

 
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