ABRIDGED DATA SHEET
19-6003; Rev 0; 8/11
MAX24188
Low-Cost IEEE 1588 Clock
General Description
The MAX24188 is a flexible, low-cost IEEE 1588
clock designed to be the central 1588 time base in a
multiport system. In such systems (typically boundary
clocks or transparent clocks) timestampers at the
ports must all have a common time and frequency
reference. The MAX24188 serves as that common
reference. As the system exchanges 1588 packets
with an external 1588 master and calculates its time
offset vs. the master, the MAX24188 can be adjusted
by system software to zero out the time offset and
thereby achieve time and frequency synchronization
with the master. As the MAX24188 is adjusted, its
output frequency and time alignment signals are
correspondingly adjusted. All timestampers (and
other time-aware components) that receive those
signals then follow the adjustment to maintain
synchronization with the MAX24188. In this way all
1588 elements in the system maintain a common
sense of time and frequency.
The MAX24188 can be a standalone central timing
function for 1588 systems. It can also be used in
conjunction
with
one
of
Maxim’s
clock
synchronization ICs in multimode systems designed
to be clocked by 1588, 1588 plus frequency (such as
synchronous Ethernet), or frequency only.
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Highlighted Features
Complete Hardware Support for IEEE 1588
Flexible Block for Any 1588 Architecture
Enables Ordinary, Boundary, and Transparent
Clocks
Steered by Software to Follow an External 1588
Master
2
-8
ns Time Resolution and 2
-32
ns Period Resolution
1ns Input Timestamp Accuracy and Output Edge
Placement Accuracy
Three Time/Frequency Controls: Direct Time
Write, Time Adjustment, and High-Resolution
Frequency Adjustment
Programmable Clock and Time-Alignment I/O to
Synchronize All 1588 Elements in the System
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Can Provide an Output Clock Signal to Slave
Components (125MHz/N, 1 ≤ N ≤ 255)
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Can Provide an Output Time Alignment Signal
to Slave Components (e.g., 1PPS)
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Can Frequency-Lock to an Input Clock Signal
from Elsewhere in the System
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Can Timestamp an Input Time Alignment
Signal to Time-Lock to a Master Elsewhere in
the System (e.g., 1PPS)
Input Event Timestamper Detects Incoming
Time Alignment (e.g., 1PPS) or Clock Edges,
Can Timestamp Rising and/or Falling Edges
Flexible Programmable Event Generator (PEG)
Can Output 1PPS (One Pulse per Period) or a
Wide Variety of Clock Signals
Built-In Support for Telecom Equipment Timing
Architectures with Dual Redundant Timing Cards
Full Support to Enable Switches and Routers to
Be Transparent Clocks and/or Boundary Clocks
Full Support for 1588 and Synchronous Ethernet
Operates from a 10MHz, 12.8MHz, 25MHz, or
125MHz Reference Clock
SPI™ Processor Interface
1.2V Operation with 3.3V I/O
1
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Applications
Central Time-Clock for 1588-Enabled Equipment with
Timestamping on Multiple Ports
Wireless Base Stations and Controllers
Switches, Routers, DSLAMs, PON Equipment
Pseudowire Circuit Emulation Equipment
Test and Measurement Systems
Medical, Industrial, and Factory Automation Equipment
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Ordering Information
PART
MAX24188ETK+
TEMP RANGE
-40°C to +85°C
PIN-PACKAGE
68 TQFN-EP*
+Denotes
a lead-free/RoHS-compliant package.
*EP = Exposed pad.
SPI is a trademark of Motorola, Inc.
_________________________________________________________
Maxim Integrated Products
Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple
revisions of any device may be simultaneously available through various sales channels. For information about device
errata, go to:
www.maxim-ic.com/errata.
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
ABRIDGED DATA SHEET
Application Examples
Example 1: Multiport System with Central 1588 Software
TS
Ethernet Ports
TS
MAX24188
Line Card 1
Central
Switching
Function
Line Card N
TS
Ethernet Ports
TS
Example: MAX24288
Processor
1588 SW
Example: DS31400.
Optional. Can provide
holdover, clock selection
and frequency translation.
Clock Sync
Function
system clock
e.g. 25MHz
Optional: 1PPS
from GPS receiver
MAX24188
1588 Clock
1588 time alignment, e.g. 1 PPS
Example 2: Multiport System with Distributed 1588 Software
TS
Ethernet Ports
TS
Line Card 1
uP
1588 SW
Central
Switching
Function
Line Card N
uP
1588 SW
TS
Ethernet Ports
TS
Example: MAX24288
Processor
1588 SW
Example: DS31400.
Optional. Can provide
holdover, clock selection
and frequency translation.
Clock Sync
Function
system clock
e.g. 25MHz
Optional: 1PPS
from GPS receiver
MAX24188
1588 Clock
1588 time alignment, e.g. 1 PPS
Block Diagram
MAX24188
125MHz, 8 phases
RST_N
CS_N
SCLK
SDI
SDO
Reference
Clock PLL
time
125MHz
REFCLK
Control
and
Status
Time
Stamper
TS1
Time
Stamper
TS2
Time
Stamper
TS3
Prog. Event
Generator
PEG1
Prog. Event
Generator
PEG2
Output
Clock
Generator
1588
Time
Engine
JTRST_N
JTAG
GPIO Control
Note to readers:
This document is an abridged version of the full data sheet. To request the full data sheet, go to
www.maxim-ic.com/MAX24188
and click on
Request Full Data Sheet.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPO1
JTCLK
JTMS
JTDI
JTDO
GPO2
M a x i m I n t e g r a t e d P r o d u c t s , 1 2 0 S a n G a b r i e l D r iv e , S u n n y v a le , C A 9 4 0 8 6 4 0 8- 7 3 7 - 7 6 0 0
2011 Maxim Integrated Products
2
Maxim is a registered trademark of Maxim Integrated Products.
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