nous step-down DC/DC converter. Intended for medium
power applications, it operates from a 2.25V to 5.5V input
voltage range and has a constant programmable switching
frequency, allowing the use of tiny, low cost capacitors
and inductors 2mm or less in height. Each output voltage
is adjustable from 0.8V to 5V. Internal synchronous, low
R
DS(ON)
power switches provide high efficiency without
the need for external Schottky diodes.
The open drain
POR
pin goes low when either output
voltage falls 6% below regulation. The output will remain
low 150ms longer than the duration of the out of regula-
tion condition.
A user selectable mode input allows the user to trade
off ripple voltage for light load efficiency. Burst Mode
operation provides high efficiency at light loads, while
pulse skip mode provides low ripple noise at light loads.
A phase mode pin allows the second channel to operate
in-phase or 180° out-of-phase with respect to channel 1.
Out-of-phase operation produces lower RMS current on
V
IN
and thus lower stress on the input capacitor.
To further maximize battery life, the P-channel MOSFETs
are turned on continuously in dropout (100% duty cycle)
and both channels draw a total quiescent current of only
100μA. In shutdown, the device draws <1μA.
L,
LT, LTC and LTM and Burst Mode are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 6144194.
FEATURES
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High Efficiency: Up to 95%
1.5A/1A Guaranteed Minimum Output Current
Synchronizable to External Clock
Power-On-Reset Output
No Schottky Diodes Required
Programmable Frequency Operation: 1.5MHz or
Adjustable From 0.6MHz to 4MHz
Low Ripple (< 35mV
P-P
) BurstMode
®
Operation
Low R
DS(ON)
Internal Switches
Short-Circuit Protected
V
IN
: 2.25V to 5.5V
Current Mode Operation for Excellent Line and Load
Transient Response
125μA Quiescent Current in Sleep Mode
Ultralow Shutdown Current: I
Q
< 1μA
Low Dropout Operation: 100% Duty Cycle
Phase Pin Selects 2nd Channel Phase Relationship
with Respect to 1st Channel
Internal Soft-Start with Individual Run Pin Control
Available in Small Thermally Enhanced
(3mm × 5mm) DFN and 20-Lead TSSOP Packages
GPS/Navigation Systems
Automotive Instrumentation
PC Cards
Industrial Power Supplies
General Purpose Point of Load DC/DC
APPLICATIONS
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TYPICAL APPLICATION
V
IN
2.5V TO 5.5V
10μF
V
OUT1
1.8V
1.5A
1.5μH
22pF
V
IN
511k
V
FB1
47μF
412k
I
TH1
5.9k
2200pF
GND
I
TH2
2.87k
6800pF
3417A-1 TA01
OUT2 Efficiency
(Burst Mode Operation)
100
REFER TO FIGURE 4
10
100k
95
EFFICIENCY (%)
V
OUT2
2.5V
1A
EFFICIENCY
90
0.1
85
0.01
80
75
70
0.001
POWER LOSS
0.001
V
IN
FREQ
SW1
RUN1
POR
RESET
2.2μH
22pF
V
IN
866k
412k
22μF
1
POWER LOSS (W)
SW2
RUN2
LTC3417A-1
V
FB2
V
IN
= 3.6V
V
OUT
= 2.5V
FREQ = 1MHz
0.01
0.1
LOAD CURRENT (A)
1
3417A-1 TA01a
0.0001
3417a1fa
1
LTC3417A-1
ABSOLUTE MAXIMUM RATINGS
(Note 1)
V
IN1
, V
IN2
Voltages ...................................... – 0.3V to 6V
SYNC/MODE, SW1, SW2, RUN1,
RUN2, V
FB1
, V
FB2
, PHASE, FREQ,
I
TH1
, I
TH2
Voltages........ –0.3V to ((V
IN1
or V
IN2
) + 0.3V)
V
IN1
– V
IN2
, V
IN2
– V
IN1
.......................................... 0.3V
POR
Voltage ................................................ –0.3V to 6V
Operating Temperature Range (Note 2)
LTC3417AE-1 ...................................... –40°C to 85°C
LTC3417AI-1 ..................................... –40°C to 125°C
Junction Temperature (Notes 7, 8) ...................... 125°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
RUN1
V
IN1
ITH1
V
FB1
V
FB2
I
TH2
RUN2
V
IN2
1
2
3
4
5
6
7
8
17
16 PGND1
15 SW1
14 PHASE
13 GNDA
12 FREQ
11
POR
10 SW2
9
SYNC/MODE
GNDD
RUN1
V
IN1
I
TH1
V
FB1
V
FB2
I
TH2
RUN2
V
IN2
1
2
3
4
5
6
7
8
9
21
20 GNDD
19 PGND1
18 SW1
17 PHASE
16 GNDA
15 FREQ
14
POR
13 SW2
12 SYNC/MODE
11 PGND2
PGND2 10
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/ W
EXPOSED PAD (PIN 17) IS PGND2/GNDD
MUST BE SOLDERED TO PCB
FE PACKAGE
20-LEAD PLASTIC TSSOP
T
JMAX
= 125°C,
θ
JA
= 38°C/ W
EXPOSED PAD (PIN 21) IS PGND2/GNDD
MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3417AEDHC-1#PBF
LTC3417AIDHC-1#PBF
LTC3417AEFE-1#PBF
LTC3417AIFE-1#PBF
TAPE AND REEL
LTC3417AEDHC-1#TRPBF
LTC3417AIDHC-1#TRPBF
LTC3417AEFE-1#TRPBF
LTC3417AIFE-1#TRPBF
PART MARKING*
3417A1
3417A1
LTC3417AFE-1
LTC3417AFE-1
PACKAGE DESCRIPTION
16-Lead (3mm
×
5mm) Plastic DFN
16-Lead (3mm
×
5mm) Plastic DFN
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN1
, V
IN2
I
FB1
, I
FB2
PARAMETER
Operating Voltage Range
Feedback Pin Input Current
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V unless otherwise specified (Note 2).
CONDITIONS
V
IN1
= V
IN2
V
IN
= 6V Pin Under Test = 3V
MIN
2.25
TYP
MAX
5.5
±
0.1
UNITS
V
μA
3417a1fa
2
LTC3417A-1
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V unless otherwise specified (Note 2).
SYMBOL
V
FB1
, V
FB2
ΔV
LINEREG
PARAMETER
Feedback Voltage
Reference Voltage Line Regulation. %/V
is the Percentage Change in V
OUT
with a
Change in V
IN
Output Voltage Load Regulation
Error Amplifier Transconductance
Input DC Supply Current (Note 4)
Active Mode
CONDITIONS
(Note 3)
V
IN
= 2.25V to 5V (Note 3)
l
ELECTRICAL CHARACTERISTICS
MIN
0.784
TYP
0.8
0.02
MAX
0.816
0.2
UNITS
V
%/V
ΔV
LOADREG
g
m(EA)
I
S
I
TH1
, I
TH2
= 0.36V (Note 3)
I
TH1
, I
TH2
= 0.84V (Note 3)
I
TH1
, I
TH2(PINLOAD)
= ±5μA (Note 3)
V
FB1
= V
FB2
= 0.75V, V
SYNC/MODE
= V
IN
,
V
RUN1
= V
RUN2
= V
IN
V
FB2
= 0.75V, V
SYNC/MODE
= V
IN
, V
RUN2
= V
IN
V
FB1
= V
FB2
= 1V, V
SYNCMODE
= V
IN
, V
RUN1
=
V
RUN2
= V
IN
V
RUN1
= V
RUN2
= 0V
V
FREQ
= V
IN
V
FREQ
: R
T
= 143k
V
FREQ
: Resistor (Note 6)
1.2
0.85
2.1
1.4
V
IN1
= 3.6V (Note 5)
V
IN1
= 3.6V (Note 5)
V
IN2
= 3.6V (Note 5)
V
IN2
= 3.6V (Note 5)
V
IN1
= 6V, V
RUN1
= 0V
V
IN2
= 6V, V
RUN2
= 0V
V
IN1
, V
IN2
Ramping Down
V
IN1
, V
IN2
Ramping Up
1.9
1.95
0.02
–0.02
1400
400
260
260
125
0.01
1.5
1
2.5
1.7
0.088
0.084
0.16
0.15
0.01
0.01
2.07
2.12
–6
–8
120
212,992
294,912
0.3
V
IN
–0.5
0.85
0.2
–0.2
%
%
μS
600
400
400
250
1
1.8
1.25
4
μA
μA
μA
μA
μA
MHz
MHz
MHz
A
A
Ω
Ω
Ω
Ω
I
S
Half Active Mode (V
RUN2
= 0V, 1.5A Only) V
FB1
= 0.75V, V
SYNC/MODE
= V
IN
, V
RUN1
= V
IN
Half Active Mode (V
RUN1
= 0V, 1A Only)
Both Channels in Sleep Mode
Shutdown
f
OSC
Oscillator Frequency
I
LIM1
I
LIM2
R
DS(ON)1
R
DS(ON)2
I
SW1(LKG)
I
SW2(LKG)
V
UVLO
V
TH(POR)
Peak Switch Current Limit on SW1 (1.5A)
Peak Switch Current Limit on SW2 (1A)
SW1 Top Switch On-Resistance (1.5A)
SW1 Bottom Switch On-Resistance
SW2 Top Switch On-Resistance (1A)
SW2 Bottom Switch On-Resistance
Switch Leakage Current SW1 (1.5A)
Switch Leakage Current SW2 (1A)
Undervoltage Lockout Threshold
1
1
2.2
2.25
μA
μA
V
V
%
%
Power-On-Reset Threshold
V
FB1
or V
FB2
Ramping Up
Percentage Deviation of V
FB
Voltage from
V
FB1
or V
FB2
Ramping Down
Steady State Value (Typically 0.8V)
Power-On-Reset Pull Down On-Resistance
Power-On-Reset De-Assertion Delay from FREQ = V
IN
Fault Removal
FREQ Tied to GND Through 143k Resistor
R
POR
t
POR
300
Ω
Clock
Cycles
Clock
Cycles
V
RUN1,
V
RUN2
V
PHASE
RUN1, RUN2 Threshold
PHASE Threshold High-CMOS Levels
PHASE Threshold Low-CMOS Levels
V
IN
= 6V, Pin Under Test = 3V
1.5
V
V
0.5
±0.01
±1
0.5
V
IN
–0.5
V
IN
–0.5
V
μA
V
V
V
I
RUN1,
I
RUN2,
I
PHASE,
RUN1, RUN2, PHASE and SYNC/MODE
Leakage Current
I
SYNC/MODE
VTL
SYNC/MODE
VTH
SYNC/MODE
VTH
FREQ
SYNC/MODE Threshold Voltage Low
SYNC/MODE Threshold Voltage High
FREQ Threshold Voltage High
3417a1fa
3
LTC3417A-1
ELECTRICAL CHARACTERISTICS
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3417AE-1 is guaranteed to meet specified performance
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
ambient temperature range are assured by design, characterization
and correlation with statistical process controls. The LTC3417AI-1 is
guaranteed to meet performance specifications over the –40°C to 125°C
operating temperature range.
Note 3:
The LTC3417A-1 is tested in feedback loop which servos V
FB1
to
the midpoint for the error amplifier (V
ITH1
= 0.6V) and V
FB2
to the midpoint
for the error amplifier (V
ITH2
= 0.6V).
Note 4:
Total supply current is higher due to the internal gate charge being
delivered at the switching frequency.
Note 5:
Switch on-resistance is guaranteed by design and test correlation
on the DHC package and by final test correlation on the FE package.
Note 6:
Variable frequency operation with resistor is guaranteed by design
but not production tested and is subject to duty cycle limitations.
Note 7:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
FPGA/CPLD
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