LT3510EFE (Notes 2, 8) ..................... –40°C to 125°C
LT3510IFE (Notes 2, 8) ...................... –40°C to 125°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
V
IN2
10
FE PACKAGE
20-LEAD PLASTIC TSSOP
T
JMAX
= 125°C,
θ
JA
= 45°C/W,
θ
JC(PAD)
= 10°C/W
EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3510EFE#PBF
LT3510IFE#PBF
LEAD BASED FINISH
LT3510EFE
LT3510IFE
TAPE AND REEL
LT3510EFE#TRPBF
LT3510IFE#TRPBF
TAPE AND REEL
LT3510EFE#TR
LT3510IFE#TR
PART MARKING*
LT3510FE
LT3510FE
PART MARKING*
LT3510FE
LT3510FE
PACKAGE DESCRIPTION
20-Lead TSSOP
20-Lead TSSOP
PACKAGE DESCRIPTION
20-Lead TSSOP
20-Lead TSSOP
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
PARAMETER
SHDN Threshold
SHDN Input Current
Minimum Input Voltage Ch 1 (Note 3)
Minimum Input Voltage Ch 2
Supply Shutdown Current Ch 1
Supply Shutdown Current Ch 2
Supply Quiescent Current Ch 1
Supply Quiescent Current Ch 2
Feedback Voltage Ch 1/2
CONDITIONS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
J
= 25°C. V
VIN1/2
= 15V, V
BST1/2
= open, V
RT/SYNC
= 2V, V
VOUT1/2
= open,
unless otherwise specified.
MIN
l
TYP
1.28
10
3
2.8
2.8
MAX
1.37
13
5
3
3
30
5
5
500
0.816
UNITS
V
μA
μA
V
V
μA
μA
mA
μA
V
3510fc
V
OUT1/2
= 0V, R
T
/SYNC = 133k
V
SHDN
= 1.375V
V
SHDN
= 1.225V
V
FB1/2
= 0V, V
VOUT1/2
= 0V, V
IND1/2
= 0V, R
T
/SYNC = 133k
V
FB1/2
= 0V, V
VOUT1/2
= 0V, V
IND1/2
= 0V
V
SHDN
= 0V
V
SHDN
= 0V
V
FB1/2
= 0.9V
V
FB1/2
= 0.9V
V
VC1/2
= 1V
1.23
7
2
l
9
0
3.5
200
l
0.784
0.8
2
LT3510
ELECTRICAL CHARACTERISTICS
PARAMETER
Feedback Voltage Line Regulation
Feedback Voltage Offset Ch 1 to Ch 2
Feedback Bias Current Ch 1/2
Error Amplifier g
m
Ch 1/2
Error Amplifier Gain Ch 1/2
Error Amplifier to Switch Gain Ch 1/2
Error Amplifier Source Current Ch 1/2
Error Amplifier Sink Current Ch 1/2
Error Amplifier High Clamp Ch 1/2
Error Amplifier Switching Threshold Ch 1/2
Soft-Start Source Current Ch 1/2
Soft-Start V
OH
Ch 1/2
Soft-Start Sink Current Ch 1/2
Soft-Start V
OL
Ch 1/2
Soft-Start to Feedback Offset Ch 1/2
Soft-Start Sink Current Ch 1/2 POR
Soft-Start POR Threshold Ch 1/2
Soft-Start Switching Threshold Ch 1/2
Power Good Leakage Ch 1/2
Power Good Threshold Ch 1/2
Power Good Hysteresis Ch 1/2
Power Good Sink Current Ch 1/2
Power Good Shutdown Sink Current Ch 1/2
R
T
/SYNC Reference Voltage
Switching Frequency
Switching Phase Angle Ch A to Ch B
Minimum Boost for 100% Duty Cycle Ch 1/2
SYNC Frequency Range
SYNC Switching Phase Angle Ch A to Ch B
IND + V
OUT
Current Ch 1/2
IND to V
OUT
Maximum Current Ch 1/2
Switch Leakage Current Ch 1/2
Switch Saturation Voltage Ch 1/2
Boost Current Ch 1/2
Minimum Boost Voltage Ch 1/2
V
FB1/2
= 0.6V, V
VC1/2
= 1V
V
FB1/2
= 1V, V
VC1/2
= 1V
V
FB1/2
= 0.7V
V
OUT1/2
= 5V, R
T
/SYNC = 133k
V
FB1/2
= 0.6V, V
SS1/2
= 0.4V
V
FB1/2
= 0.9V
V
FB1/2
= 0.6V, V
SS1/2
= 1V
V
FB1/2
= 0V
V
VC1/2
= 1V, V
SS1/2
= 0.4V
V
SS1/2
= 0.4V (Note 4), V
VC
= 1V
V
FB1/2
= 0V (Note 4)
V
FB1/2
= 0V
V
FB1/2
= 0.9V, V
PG1/2
= 25V, V
VIN1/2
= 25V, V
OUT
= 5V
V
FB1/2
Rising, PG1/2 = 20k to 5V
V
FB1/2
Falling, PG1/2 = 20k to 5V
V
FB1/2
= 0.65V, V
PG1/2
= 0.4V
V
VIN1/2
= 2V, V
FB1/2
= 0V, V
PG1/2
= 0.4V
V
FB1/2
= 0.9V, I
RT/SYNC
= –40μA
R
T
/SYNC = 133k, V
FB1/2
= 0.6V, V
BST1/2
= V
SW
+ 3V
R
T
/SYNC = 15.4k, V
FB1/2
= 0.6V, V
BST1/2
= V
SW
+ 3V
R
T
/SYNC = 133k, V
FB1/2
= 0.6V, V
BST1/2
= V
SW
+ 3V
V
FB1/2
= 0.7V, I
RT/SYNC
= –35μA (Note 5), V
OUT
= 0V
V
BST1/2
= V
SW
+ 3V
SYNC = 250kHz, V
BST1/2
= V
SW
+ 3V
V
VOUT1/2
= 0V, V
FB1/2
= 0.9V
V
VOUT1/2
= 5V
V
VOUT1/2
= 0.5V (Note 6), V
FB1/2
= 0.7V, V
BST1/2
= 20V
V
VOUT1/2
= 5V (Note 6), R
T
/SYNC = 133k, V
BST1/2
= 20V
V
SW1/2
= 0V, V
VIN1/2 = 25V
I
SW1/2
= 2A, V
BST1/2
= 20V, V
FB1/2
= 0.7V
I
SW1/2
= 2A, V
BST1/2
= 20V, V
FB1/2
= 0.7V
I
SW1/2
= 2A, V
BST1/2
= 20V, V
FB1/2
= 0.7V (Note 7)
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
J
= 25°C. V
VIN1/2
= 15V, V
BST1/2
= open, V
RT/SYNC
= 2V, V
VOUT1/2
= open,
unless otherwise specified.
CONDITIONS
V
VIN1/2
= 3V to 25V
V
VC1/2
= 1V
V
FB1/2
= 0.8V, V
VC1/2
= 1V
V
VC1/2
= 1V, I
VC1/2
= ±5μA
l
l
l
l
MIN
–1
–16
–200
150
TYP
0
0
75
275
1000
2.2
MAX
1
16
200
450
UNITS
%
mV
nA
μmho
V/V
A/V
10
15
1.75
0.5
2.5
1.9
200
50
–16
0.5
55
30
87
20
400
10
0.93
200
1.2
120
250
120
40
2.25
2.5
15
20
2.0
0.7
3.25
2
600
80
0
1.5
80
50
0
90
30
800
50
0.975
250
1.5
180
1.7
180
70
0
2.8
2.8
0
250
25
30
2.25
1.0
4
2.4
1000
125
16
2
105
70
1
93
50
1200
100
1
300
1.8
210
2
1500
210
100
1
4
4
50
400
100
2.5
μA
μA
V
V
μA
V
μA
mV
mV
mA
mV
mV
μA
%
mV
μA
μA
V
kHz
MHz
Deg
V
kHz
Deg
μA
μA
A
A
μA
mV
mA
V
25
50
1.4
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LT3510EFE is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
3510fc
3
LT3510
ELECTRICAL CHARACTERISTICS
LT3510IFE is guaranteed and tested over the full –40°C to 125°C operating
junction temperature range.
Note 3:
Minimum input voltage is defined as the voltage where internal
bias lines are regulated so that the reference voltage and oscillator remain
constant. Actual minimum input voltage to maintain a regulated output
will depend upon output voltage and load current. See Applications
Information.
Note 4:
An internal power-on reset (POR) latch is set on the positive
transition of the SHDN pin through its threshold. The output of the latch
activates current sources on each SS pin which typically sink 1.5mA,
discharging the SS capacitor. The latch is reset when both SS pins are
driven below the soft-start POR threshold or the SHDN pin is taken below
its threshold.
Note 5:
To enhance dropout operation, the output switch will be turned off
for the minimum off time only when the voltage across the boost capacitor
drops below the minimum boost for 100% duty cycle threshold.
Note 6:
The IND to V
OUT
maximum current is defined as the value of
current flowing from the IND pin to the V
OUT
pin which resets the switch
latch when the V
C
pin is at its high clamp.
Note 7:
This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 8:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
FPGA/CPLD
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