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LPC2478

Single-chip 16-bit/32-bit micro; 512 kB ﬂash, Ethernet, CAN,

LCD, USB 2.0 device/host/OTG, external memory interface

Rev. 01 — 11 November 2008

Preliminary data sheet

1. General description

NXP Semiconductors designed the LPC2478 microcontroller, powered by the

ARM7TDMI-S core, to be a highly integrated microcontroller for a wide range of

applications that require advanced communications and high quality graphic displays. The

LPC2478 microcontroller has 512 kB of on-chip high-speed ﬂash memory. This ﬂash

memory includes a special 128-bit wide memory interface and accelerator architecture

that enables the CPU to execute sequential instructions from ﬂash memory at the

maximum 72 MHz system clock rate. This feature is available only on the LPC2000 ARM

microcontroller family of products. The LPC2478, with real-time debug interfaces that

include both JTAG and embedded trace, can execute both 32-bit ARM and 16-bit Thumb

instructions.

The LPC2478 microcontroller incorporates an LCD controller, a 10/100 Ethernet Media

Access Controller (MAC), a USB full-speed Device/Host/OTG Controller with 4 kB of

endpoint RAM, four UARTs, two Controller Area Network (CAN) channels, an SPI

interface, two Synchronous Serial Ports (SSP), three I

2

C interfaces, and an I

2

S interface.

Supporting this collection of serial communications interfaces are the following feature

components; an on-chip 4 MHz internal oscillator, 98 kB of total RAM consisting of 64 kB

of local SRAM, 16 kB SRAM for Ethernet, 16 kB SRAM for general purpose DMA, 2 kB of

battery powered SRAM, and an External Memory Controller (EMC). These features make

this device optimally suited for portable electronics and Point-of-Sale (POS) applications.

Complementing the many serial communication controllers, versatile clocking capabilities,

and memory features are various 32-bit timers, a 10-bit ADC, 10-bit DAC, two PWM units,

and up to 160 fast GPIO lines. The LPC2478 connects 64 of the GPIO pins to the

hardware based Vector Interrupt Controller (VIC) that means these external inputs can

generate edge-triggered interrupts. All of these features make the LPC2478 particularly

suitable for industrial control and medical systems.

2. Features

I

ARM7TDMI-S processor, running at up to 72 MHz.

I

512 kB on-chip ﬂash program memory with In-System Programming (ISP) and

In-Application Programming (IAP) capabilities. Flash program memory is on the ARM

local bus for high performance CPU access.

I

98 kB on-chip SRAM includes:

N

64 kB of SRAM on the ARM local bus for high performance CPU access.

N

16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.

N

16 kB SRAM for general purpose DMA use also accessible by the USB.

N

2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.

NXP Semiconductors

LPC2478

Single-chip 16-bit/32-bit microcontroller

I

LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film

Transistors (TFT) displays.

N

Dedicated DMA controller.

N

Selectable display resolution (up to 1024

×

768 pixels).

N

Supports up to 24-bit true-color mode.

I

Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet

DMA, USB DMA, and program execution from on-chip ﬂash with no contention.

I

EMC provides support for asynchronous static memory devices such as RAM, ROM

and ﬂash, as well as dynamic memories such as single data rate SDRAM.

I

Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.

I

General Purpose DMA (GPDMA) controller on AHB that can be used with the SSP,

I

2

S-bus, and SD/MMC interface as well as for memory-to-memory transfers.

I

Serial Interfaces:

N

Ethernet MAC with MII/RMII interface and associated DMA controller. These

functions reside on an independent AHB.

N

USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and

associated DMA controller.

N

Four UARTs with fractional baud rate generation, one with modem control I/O, one

with IrDA support, all with FIFO.

N

CAN controller with two channels.

N

SPI controller.

N

Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate

for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA

controller.

N

Three I

2

C-bus interfaces (one with open-drain and two with standard port pins).

N

I

2

S (Inter-IC Sound) interface for digital audio input or output. It can be used with

the GPDMA.

I

Other peripherals:

N

SD/MMC memory card interface.

N

160 General purpose I/O pins with conﬁgurable pull-up/down resistors.

N

10-bit ADC with input multiplexing among 8 pins.

N

10-bit DAC.

N

Four general purpose timers/counters with 8 capture inputs and 10 compare

outputs. Each timer block has an external count input.

N

Two PWM/timer blocks with support for three-phase motor control. Each PWM has

an external count inputs.

N

RTC with separate power domain. Clock source can be the RTC oscillator or the

APB clock.

N

2 kB SRAM powered from the RTC power pin, allowing data to be stored when the

rest of the chip is powered off.

N

WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,

the RTC oscillator, or the APB clock.

I

Single 3.3 V power supply (3.0 V to 3.6 V).

I

4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as

the system clock.

I

Three reduced power modes: idle, sleep, and power-down.

LPC2478_1

Preliminary data sheet

Rev. 01 — 11 November 2008

2 of 78

NXP Semiconductors

LPC2478

Single-chip 16-bit/32-bit microcontroller

I

Four external interrupt inputs conﬁgurable as edge/level sensitive. All pins on port 0

and port 2 can be used as edge sensitive interrupt sources.

I

Processor wake-up from Power-down mode via any interrupt able to operate during

Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet

wake-up interrupt, CAN bus activity, port 0/2 pin interrupt).

I

Two independent power domains allow ﬁne tuning of power consumption based on

needed features.

I

Each peripheral has its own clock divider for further power saving. These dividers help

reduce active power by 20 % to 30 %.

I

Brownout detect with separate thresholds for interrupt and forced reset.

I

On-chip power-on reset.

I

On-chip crystal oscillator with an operating range of 1 MHz to 25 MHz.

I

On-chip PLL allows CPU operation up to the maximum CPU rate without the need for

a high frequency crystal. May be run from the main oscillator, the internal RC

oscillator, or the RTC oscillator.

I

Boundary scan for simpliﬁed board testing.

I

Versatile pin function selections allow more possibilities for using on-chip peripheral

functions.

I

Standard ARM test/debug interface for compatibility with existing tools.

I

Emulation trace module supports real-time trace.

3. Applications

I

Industrial control

Medical systems

Portable electronics

Point-of-Sale (POS) equipment

4. Ordering information

Table 1.

Ordering information

Package

Name

LPC2478FBD208 LQFP208

Description

plastic low proﬁle quad ﬂat package; 208 leads; body 28

×

28

×

1.4 mm

Version

SOT459-1

SOT950-1

Type number

LPC2478FET208 TFBGA208 plastic thin ﬁne-pitch ball grid array package; 208 balls; body 15

×

15

×

0.7 mm

LPC2478_1

Preliminary data sheet

Rev. 01 — 11 November 2008

3 of 78

NXP Semiconductors

LPC2478

Single-chip 16-bit/32-bit microcontroller

4.1 Ordering options

Table 2.

Ordering options

Flash

(kB)

Local bus

SRAM (kB)

Ethernet buffer

External Ethernet USB

bus

OTG/

OHC/

device

+ 4 kB

FIFO

SD/

GP

MMC DMA

CAN channels

ADC channels

yes

8

DAC channels

1

−40 °C

to +85

°C

−40 °C

to +85

°C

Type number

Temp range

GP/USB

LPC2478FBD208 512

LPC2478FET208

512

6

4

6

4

1

6

1

6

1

6

1

6

2

9

8

9

8

Total

RTC

Full

32-bit

Full

32-bit

MII/RMII

yes

2

LPC2478_1

Preliminary data sheet

Rev. 01 — 11 November 2008

4 of 78

NXP Semiconductors

LPC2478

Single-chip 16-bit/32-bit microcontroller

5. Block diagram

XTAL1

V

DD(3V3)

XTAL2

V

DDA

TMS TDI

trace signals

TRST

TCK TDO

EXTIN0 DBGEN

RESET

VREF

V

SSA

, V

SSIO,

V

SSCORE

V

DD(DCDC)(3V3)

TEST/DEBUG

INTERFACE

EMULATION

TRACE MODULE

P0, P1, P2,

P3, P4

LPC2478

64 kB

SRAM

512 kB

FLASH

PLL

system

clock

SYSTEM

FUNCTIONS

INTERNAL RC

OSCILLATOR

HIGH-SPEED

GPIO

160 PINS

TOTAL

INTERNAL

CONTROLLERS

SRAM FLASH

ARM7TDMI-S

VIC

16 kB

SRAM

EXTERNAL

MEMORY

CONTROLLER

AHB1

D[31:0]

A[23:0]

control lines

AHB2

AHB

BRIDGE

AHB

BRIDGE

USB DEVICE/

HOST/OTG WITH

4 kB RAM AND DMA

GP DMA

CONTROLLER

LCD INTERFACE

WITH DMA

8

×

LCD control

LCDVD[23:0]

LCDCLKIN

V

BUS

port1

port2

MII/RMII

ETHERNET

MAC WITH

DMA

16 kB

SRAM

MASTER AHB TO SLAVE

PORT AHB BRIDGE PORT

AHB TO

APB BRIDGE

EINT3 to EINT0

P0, P2

2

×

CAP0/CAP1/

CAP2/CAP3

4

×

MAT2/MAT3,

2

×

MAT0,

3

×

MAT1

6

×

PWM0/PWM1

1

×

PCAP0,

2

×

PCAP1

P0, P1

EXTERNAL INTERRUPTS

CAPTURE/COMPARE

TIMER0/TIMER1/

TIMER2/TIMER3

I

2

S INTERFACE

PWM0, PWM1

SSP0/SPI INTERFACE

LEGACY GPI/O

64 PINS TOTAL

SSP1 INTERFACE

3

×

I2SRX

3

×

I2STX

SCK0, SCK

MOSI0, MOSI

MISO0, MISO

SSEL0, SSEL

SCK1

MOSI1

MISO1

SSEL1

MCICLK, MCIPWR

MCICMD,

MCIDAT[3:0]

TXD0, TXD2, TXD3

RXD0, RXD2, RXD3

TXD1, DTR1, RTS1

RXD1, DSR1, CTS1,

DCD1, RI1

RD1, RD2

TD1, TD2

SCL0, SCL1, SCL2

SDA0, SDA1, SDA2

8

×

AD0

A/D CONVERTER

SD/MMC CARD

INTERFACE

AOUT

VBAT

power domain 2

RTCX1

RTCX2

ALARM

D/A CONVERTER

2 kB BATTERY RAM

UART0, UART2, UART3

RTC

OSCILLATOR

REAL-

TIME

CLOCK

UART1

CAN1, CAN2

WATCHDOG TIMER

SYSTEM CONTROL

I

2

C0, I

2

C1, I

2

C2

002aac805

Fig 1.

LPC2478 block diagram

LPC2478_1

Preliminary data sheet

Rev. 01 — 11 November 2008

5 of 78

LPC2478_08

LPC2478_08概述

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