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LPC2157/2158

Single-chip 16-bit/32-bit microcontrollers; 512 kB ﬂash, with

32 segment x 4 LCD driver

Rev. 02 — 9 February 2009

Product data sheet

1. General description

The LPC2157/2158 is a multi-chip module consisting of a LPC2138/2148 single-chip

microcontroller combined with a PCF8576D Universal LCD driver in a low-cost 100-pin

package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes.

Display overhead is minimized by an on-chip display RAM with auto-increment

addressing. Refer to the respective LPC2148 and LPC2138 user manual for details.

2. Features

I

128-bit wide interface/accelerator enables high-speed 60 MHz operation.

N

32 kB to 40 kB of on-chip static RAM and 512 kB of on-chip ﬂash memory.

I

USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM.

N

An additional 8 kB of on-chip RAM accessible to USB by DMA (LPC2158 only).

I

32 segment

×

4 backplane LCD controller supports from 1 to 4 backplanes.

I

Single 10-bit DAC provides variable analog output.

I

Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.

I

Multiple serial interfaces including two UARTs (16C550), two Fast I

2

C-bus (400 kbit/s),

SPI and SSP with buffering and variable data length capabilities.

I

Single power supply chip with POR and BOD circuits:

N

CPU operating voltage range of 3.0 V to 3.6 V (3.3 V

±

10 %) with 5 V tolerant

I/O pads.

I

100-pin LQFP package with 38 microcontroller I/O pins minimum.

I

Individual enable/disable of peripheral functions as well as peripheral clock scaling for

additional power optimization.

3. Ordering information

Table 1.

Ordering information

Package

Name

LPC2157FBD100

LPC2158FBD100

LQFP100

Description

plastic low proﬁle quad ﬂat package; 100 leads; body 14

×

14

×

1.4 mm

plastic low proﬁle quad ﬂat package; 100 leads; body 14

×

14

×

1.4 mm

Version

SOT407-1

Type number

NXP Semiconductors

LPC2157/2158

Single-chip 16-bit/32-bit microcontrollers

4. Block diagram

S[31:0]

P1[31:25],

P1[17:16]

P0[31:28], P0[27:26]

(1)

,

P0[25], P0[23:0]

LPC2157/

LPC2158

MCU

PCF8576D

LCD

CONTROLLER

BP[3:0]

V

LCD

A[2:0]

OSC

002aad382

(1) LPC2157 only.

Fig 1.

Block diagram of LPC2157/2158

LPC2157_2158_2

Product data sheet

Rev. 02 — 9 February 2009

SCL_LCD, SDA_LCD

SCL, SDA

SA0

2 of 45

NXP Semiconductors

LPC2157/2158

Single-chip 16-bit/32-bit microcontrollers

TMS

(1)

TDI

(1)

TRST

(1)

TCK

(1)

TDO

(1)

XTAL2

XTAL1 RESET

EMULATION TRACE

MODULE

LPC2157/2158

P1[31:25],

P1[17:16]

P0[31:28],

P0[27:26]

(3)

P0[25],

P0[23:0]

TEST/DEBUG

INTERFACE

PLL0

system

clock

PLL1

USB

clock

VECTORED

INTERRUPT

CONTROLLER

SYSTEM

FUNCTIONS

FAST GENERAL

PURPOSE I/O

ARM7TDMI-S

AHB BRIDGE

ARM7 local bus

AMBA AHB

(Advanced High-performance Bus)

INTERNAL

SRAM

CONTROLLER

INTERNAL

FLASH

CONTROLLER

8 kB RAM

SHARED WITH

USB DMA

(2)

AHB

DECODER

32 kB

SRAM

512 kB

FLASH

AHB TO APB

BRIDGE

APB

DIVIDER

APB (advanced

peripheral bus)

EINT3 to

EINT0

EXTERNAL

INTERRUPTS

USB 2.0 FULL-SPEED

DEVICE CONTROLLER

WITH DMA

(2)

D+

D−

UP_LED

CONNECT

VBUS

SCL0, SCL1

4

×

CAP0

4

×

CAP1

8

×

MAT0

8

×

MAT1

AD0[7:6],

AD0[5]

(3)

AD0[0]

(3)

AD0[4:1]

AD1[7:0]

CAPTURE/COMPARE

(W/EXTERNAL CLOCK)

TIMER 0/TIMER 1

I

2

C-BUS SERIAL

INTERFACES 0 AND 1

SDA0, SDA1

SCK0, SCK1

A/D CONVERTERS

0 AND 1

SPI AND SSP

SERIAL INTERFACES

MOSI0, MOSI1

MISO0, MISO1

SSEL0, SSEL1

TXD0, TXD1

AOUT

D/A CONVERTER

UART0/UART1

RXD0, RXD1

P0[31:28] and

P0[25:0]

P1[31:16]

GENERAL

PURPOSE I/O

REAL-TIME CLOCK

DSR1,CTS1,

RTS1, DTR1,

DCD1,RI1

RTCX1

RTCX2

VBAT

PWM[6:1]

PWM0

WATCHDOG

TIMER

SYSTEM

CONTROL

002aad384

(1) Pins shared with GPIO.

(2) USB DMA controller with 8 kB of RAM accessible as general purpose RAM and/or DMA is available in LPC2158 only.

(3) LPC2157 only.

Fig 2.

Microcontroller section block diagram

LPC2157_2158_2

Product data sheet

Rev. 02 — 9 February 2009

3 of 45

NXP Semiconductors

LPC2157/2158

Single-chip 16-bit/32-bit microcontrollers

BP0 BP1 BP2 BP3

S[31:0]

V

DD(LCD)

BACKPLANE

OUTPUTS

LCD

VOLTAGE

SELECTOR

LCD BIAS

GENERATOR

V

LCD

SHIFT REGISTER

DISPLAY SEGMENT OUTPUTS

DISPLAY LATCH

CLK

SYNC

TIMING

BLINKER

DISPLAY

CONTROLLER

INPUT

BANK

SELECTOR

DISPLAY

RAM

40

×

4 BITS

OUTPUT

BANK

SELECTOR

OSC

OSCILLATOR

POWER-

ON

RESET

COMMAND

DECODER

DATA

POINTER

V

SS

SCL_LCD

SDA_LCD

INPUT

FILTERS

I

2

C-BUS

CONTROLLER

SUB-

ADDRESS

COUNTER

SA0

A0 A1 A2

002aad449

Fig 3.

LCD display controller block diagram

5. Pinning information

5.1 Pinning

100

76

75

1

LPC2157FBD

25

26

50

51

002aad385

Fig 4.

Pin conﬁguration for LPC2157

LPC2157_2158_2

Product data sheet

Rev. 02 — 9 February 2009

4 of 45

NXP Semiconductors

LPC2157/2158

Single-chip 16-bit/32-bit microcontrollers

100

1

76

75

LPC2158FBD

25

26

50

51

002aad444

Fig 5.

Pin conﬁguration for LPC2158

5.2 Pin description

Table 2.

Symbol

P0[0] to P0[31]

Pin description LPC2157

Type

I/O

Description

Port 0:

Port 0 is a 32-bit I/O port with individual direction controls for each bit.

Total of 31 pins of the Port 0 can be used as a general purpose bidirectional

digital I/Os while P0[31] is output only pin. The operation of port 0 pins

depends upon the pin function selected via the pin connect block.

Pin P0[24] is not available.

P0[0]/TXD0/

PWM1

7

[1]

I/O

O

P0[1]/RXD0/

PWM3/EINT0

9

[2]

I/O

I

O

I

P0[2]/SCL0/

CAP0[0]

10

[3]

I/O

I

P0[3]/SDA0/

MAT0[0]/EINT1

14

[3]

I/O

O

I

P0[4]/SCK0/

CAP0[1]/AD0[6]

15

[4]

I/O

I

P0[5]/MISO0/

MAT0[1]/AD0[7]

17

[4]

I/O

O

I

LPC2157_2158_2

P0[0] —

General purpose input/output digital pin (GPIO).

TXD0 —

Transmitter output for UART0.

PWM1 —

Pulse Width Modulator output 1.

P0[1] —

General purpose input/output digital pin (GPIO).

RXD0 —

Receiver input for UART0.

PWM3 —

Pulse Width Modulator output 3.

EINT0 —

External interrupt 0 input.

P0[2] —

General purpose input/output digital pin (GPIO).

SCL0 —

I

2

C0 clock input/output. Open-drain output (for I

2

C-bus compliance).

CAP0[0] —

Capture input for Timer 0, channel 0.

P0[3] —

General purpose input/output digital pin (GPIO).

SDA0 —

I

2

C0 data input/output. Open-drain output (for I

2

C-bus compliance).

MAT0[0] —

Match output for Timer 0, channel 0.

EINT1 —

External interrupt 1 input.

P0[4] —

General purpose input/output digital pin (GPIO).

SCK0 —

Serial clock for SPI0. SPI clock output from master or input to slave.

CAP0[1] —

Capture input for Timer 0, channel 1.

AD0[6] —

ADC 0, input 6.

P0[5] —

General purpose input/output digital pin (GPIO).

MISO0 —

Master In Slave Out for SPI0. Data input to SPI master or data

output from SPI slave.

MAT0[1] —

Match output for Timer 0, channel 1.

AD0[7] —

ADC 0, input 7.

Product data sheet

Rev. 02 — 9 February 2009

5 of 45

LPC2157_09

LPC2157_09概述

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