电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74AUP2G14GX

产品描述Inverter, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6
产品类别逻辑    逻辑   
文件大小886KB,共23页
制造商Nexperia
官网地址https://www.nexperia.com
标准
下载文档 详细参数 选型对比 全文预览

74AUP2G14GX概述

Inverter, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6

74AUP2G14GX规格参数

参数名称属性值
是否Rohs认证符合
厂商名称Nexperia
包装说明X2SON-6
Reach Compliance Codecompliant
系列AUP/ULP/V
JESD-30 代码R-PBCC-B6
JESD-609代码e4
长度1 mm
逻辑集成电路类型INVERTER
湿度敏感等级1
功能数量2
输入次数1
端子数量6
最高工作温度125 °C
最低工作温度-40 °C
封装主体材料PLASTIC/EPOXY
封装代码HVBCC
封装形状RECTANGULAR
封装形式CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)NOT SPECIFIED
传播延迟(tpd)20 ns
座面最大高度0.35 mm
最大供电电压 (Vsup)3.6 V
最小供电电压 (Vsup)0.8 V
标称供电电压 (Vsup)1.1 V
表面贴装YES
技术CMOS
温度等级AUTOMOTIVE
端子面层Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式BUTT
端子位置BOTTOM
处于峰值回流温度下的最长时间NOT SPECIFIED
宽度0.8 mm

文档预览

下载PDF文档
74AUP2G14
Low-power dual Schmitt trigger inverter
Rev. 6 — 17 September 2015
Product data sheet
1. General description
The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept
standard input signals. They are capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator

74AUP2G14GX相似产品对比

74AUP2G14GX 74AUP2G14GS,132 74AUP2G14GW,125 74AUP2G14GM,115 74AUP2G14GF,132 74AUP2G14GN,132 74AUP2G14GXZ 74AUP2G14GM,132 935307098147
描述 Inverter, AUP/ULP/V Series, 2-Func, 1-Input, CMOS, PDSO6 IC INVERTER SCHMITT 2CH 6XSON IC INVERTER SCHMITT 2CH 6TSSOP IC INVERTER SCHMITT 2CH 6XSON IC INVERTER SCHMITT 2CH 6XSON IC INVERTER SCHMITT 2CH 6XSON 74AUP2G14 - Low-power dual Schmitt trigger inverter 74AUP2G14 - Low-power dual Schmitt trigger inverter SON 6-Pin IC INVERTER SCHMITT DUAL X2SON6
包装说明 X2SON-6 VSON, TSSOP, VSON, VSON, SON, HVBCC, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, XSON-6 X2SON-6
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant compliant
系列 AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 代码 R-PBCC-B6 S-PDSO-N6 R-PDSO-G6 R-PDSO-N6 S-PDSO-N6 R-PDSO-N6 R-PBCC-B6 R-PDSO-N6 R-PBCC-B6
长度 1 mm 1 mm 2 mm 1.45 mm 1 mm 1 mm 1 mm 1.45 mm 1 mm
逻辑集成电路类型 INVERTER INVERTER INVERTER INVERTER INVERTER INVERTER INVERTER INVERTER INVERTER
功能数量 2 2 2 2 2 2 2 2 2
输入次数 1 1 1 1 1 1 1 1 1
端子数量 6 6 6 6 6 6 6 6 6
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 HVBCC VSON TSSOP VSON VSON SON HVBCC VSON HVBCC
封装形状 RECTANGULAR SQUARE RECTANGULAR RECTANGULAR SQUARE RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
传播延迟(tpd) 20 ns 20 ns 20 ns 20 ns 20 ns 20 ns 20 ns 20 ns 20 ns
座面最大高度 0.35 mm 0.35 mm 1.1 mm 0.5 mm 0.5 mm 0.35 mm 0.35 mm 0.5 mm 0.35 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
标称供电电压 (Vsup) 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V
表面贴装 YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
端子形式 BUTT NO LEAD GULL WING NO LEAD NO LEAD NO LEAD BUTT NO LEAD BUTT
端子位置 BOTTOM DUAL DUAL DUAL DUAL DUAL BOTTOM DUAL BOTTOM
宽度 0.8 mm 1 mm 1.25 mm 1 mm 1 mm 0.9 mm 0.8 mm 1 mm 0.8 mm
厂商名称 Nexperia Nexperia Nexperia - Nexperia Nexperia - Nexperia Nexperia
JESD-609代码 e4 e3 e3 e3 e3 e3 - e3 e4
湿度敏感等级 1 1 1 1 1 1 - 1 1
峰值回流温度(摄氏度) NOT SPECIFIED - 260 260 260 - NOT SPECIFIED 260 NOT SPECIFIED
端子面层 Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn) - Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au)
处于峰值回流温度下的最长时间 NOT SPECIFIED - 30 30 30 - NOT SPECIFIED 30 NOT SPECIFIED
Brand Name - Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia -
制造商包装代码 - SOT1202 SOT363 SOT886 SOT891 SOT1115 SOT1255 SOT886 -
Samacsys Description - 74AUP2G14 - Low-power dual Schmitt trigger inverter@en-us 74AUP2G14 - Low-power dual Schmitt trigger inverter@en-us - 74AUP2G14 - Low-power dual Schmitt trigger inverter@en-us 74AUP2G14 - Low-power dual Schmitt trigger inverter@en-us - 74AUP2G14 - Low-power dual Schmitt trigger inverter@en-us -
端子节距 - 0.35 mm 0.65 mm 0.5 mm 0.35 mm 0.3 mm - 0.5 mm -
零件包装代码 - - TSSOP SON SON SON - SON -
针数 - - 6 6 6 6 - 6 -
3美元600M主频的i.MX RT跨界处理器,有多大破坏性【发布会归来兮】
上午去了恩智浦的发布会(会议演讲PPT:308297), 印象最深的是 恩智浦半导体微控制器产品线全球资深产品经理曾劲涛 略带邪气地说的一句话:“600M的处理器从3块美金开始,非常有破坏性:plea ......
nmg 单片机
北大Verilog课件
数字集成电路设计入门 --从HDL到版图 于敦山 北大微电子学系 ?介绍Verilog HDL,内容包括: –Verilog应用 –Verilog语言的构成元素 –结构级描述及仿真 –行为级描述及仿真 –延时的 ......
lixiaohai8211 模拟电子
[F7设计小分队征集中] 【F7开发板英雄帖】---会思考的智能家居(深圳站)
本帖最后由 molin2050 于 2015-8-18 13:58 编辑 ...
molin2050 stm32/stm8
求男生今天心里的阴影面积
:Sad:话不多说,你懂的 今天你们公司的女神下午是不是都走啦,瞬间感觉半边天都是男生啊{:1_145:},虐男节啊 ...
nmg 聊聊、笑笑、闹闹
【是德科技感恩月征文】减少示波器幅度测量误差的小经验
【是德科技感恩月征文】减少示波器幅度测量误差的小经验我们在测量过程中会遇到一些让我们有点想不通的现象,就是利用示波器测量信号发生器产生信号的峰值,结果有些不一致,而且结果通常偏大。 ......
qditz 测试/测量
FPGA/CPLD工程师—高级培训班
FPGA/CPLD工程师—高级培训班 >>> 课程目标 通过本期培训使学员不但能够精通FPGA/CPLD软硬件设计,精通基于实时通信系统的流水线设计、乒乓操作设计等重要设计方法和技巧,而且能够掌握 ......
zhangzhen 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1612  866  2183  1767  1994  33  18  44  36  41 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved