®
ST9040
16K ROM HCMOS MCU
WITH EEPROM, RAM AND A/D CONVERTER
Register oriented 8/16 bit CORE with
RUN, WFI and HALT modes
Minimum instruction cycle time : 500ns
(12MHz internal)
Internal Memory :
ROM
16K bytes
RAM
256 bytes
EEPROM
512 bytes
224 general purpose registers available as RAM,
accumulators or index registers (register file)
80-pin PQFP package for ST9040Q
68-lead PLCC package for ST9040C
DMA controller, Interrupt handler and Serial Pe-
ripheral Interface as standard features
Up to 56 fully programmable I/O pins
Up to 8 external plus 1 non-maskableinterrupts
16 bit Timer with 8 bit Prescaler, able to be used
as a WatchdogTimer
Two 16 bit Multifunction Timers, each with an 8
bit prescaler and 13 operating modes
8 channel 8 bit Analog to Digital Converter, with
Analog Watchdogs and external references
Serial Communications Interface with asynchro-
nous and synchronous capability
Rich Instruction Set and 14 Addressingmodes
Division-by-Zero trap generation
Versatile developmenttools, including assembler,
linker, C-compiler, archiver, graphic oriented de-
buggerand hardware emulators
Real Time Operating System
Windowedand One Time Programmable EPROM
parts available for prototyping and pre-production
developmentphases
Pin to pin compatible with ST9036
PLCC68
PQFP80
(Ordering Information at the end of the Datasheet)
February 1997
1/56
TABLE OF CONTENTS
ST9040
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1.1 GENERAL DESCRIPTION . . . . . . . . . . . .
1.2 PIN DESCRIPTION . . . . . . . . . . . . . . . .
1.2.1 I/O Port Alternate Functions . . . . . . .
1.3 MEMORY . . . . . . . . . . . . . . . . . . . .
1.3.1 INTRODUCTION . . . . . . . . . . . . .
1.3.2 EEPROM . . . . . . . . . . . . . . . . .
1.3.2.1 Introduction . . . . . . . . . . . .
1.3.2.2 EEPROM Programming Procedure
1.3.2.3 Parallel Programming Procedure .
1.3.2.4 EEPROM Programming Voltage .
1.3.2.5 EEPROM Programming Time . . .
1.3.2.6 EEPROM Interrupt Management .
1.3.2.7 EEPROM Control Register . . . .
1.3.3 REGISTER MAP . . . . . . . . . . . . .
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1
5
6
6
10
10
10
10
11
11
11
11
11
12
12
13
35
38
39
39
42
42
42
49
51
52
52
55
2
ELECTRICAL CHARACTERISTICS
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ST90E40 / ST90T40
. . . . . . . . . . . . . . .
1.1 GENERAL DESCRIPTION . . . . . . . . . .
1.2 PIN DESCRIPTION . . . . . . . . . . . . . .
1.2.1 I/O PORT ALTERNATE FUNCTIONS
1.1 MEMORY . . . . . . . . . . . . . . . . . . .
1.2 EPROM PROGRAMMING . . . . . . . . . .
1.2.1 Eprom Erasing . . . . . . . . . . . .
ST90R40
. . . . . . . . . . . . . . . . . . . . . . . .
1.1 GENERAL DESCRIPTION . . . . . . . . . .
1.2 PIN DESCRIPTION . . . . . . . . . . . . . .
1.2.1 I/O PORT ALTERNATE FUNCTIONS
1.3 MEMORY . . . . . . . . . . . . . . . . . . .
2/56
®
ST9040
Figure 1. 80 Pin PQFP Package
Table 1. ST9040Q Pin Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
AV
SS
NC
NC
P44/AIN4
P57
P56
P55
P54
INT7
INT0
P53
NC
P52
P51
P50
OSCOUT
V
SS
V
SS
NC
OSCIN
RESET
P37/T1OUTB
P36/T1INB
P35/T1OUTA
Pin
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Name
P34/T1INA
P33/T0OUTB
P32/T0INB
P31/T0OUTA
P30/P/D/T0INA
A15
A14
NC
A13
A12
A11
A10
A9
A8
P00/A0/D0
P01/A1/D1
Pin
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
Name
P20/NMI
NC
V
SS
P70/SIN
P71/SOUT
P72/INT4/TXCLK
/CLKOUT
P73/INT5
/RXCLK/ADTRG
P74/P/D/INT6
P75/WAIT
P76/WDOUT
/BUSREQ
P77/WDIN
/BUSACK
R/W
NC
DS
AS
NC
V
DD
V
DD
P07/A7/D7
P06/A6/D6
P05/A5/D5
P04/A4/D4
P03/A3/D3
P02/A2/D2
Pin
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
Name
AV
DD
NC
P47/AIN7
P46/AIN6
P45/AIN5
P43/AIN3
P42/AIN2
P41/AIN1
P40/AIN0
P27/RRDY5
P26/INT3
/RDSTB5/P/D
P25/WRRDY5
P24/INT1
/WRSTB5
P23/SDO
P22/INT2/SCK
P21/SDI/P/D
3/56
®
ST9040
Figure 2. 68 Pin PLCC Package
Table 2. ST9040C Pin Description
Pin
61
62
63
64
65
66
67
68
q
1
2
3
4
5
6
7
8
9
Name
P44/AIN4
P57
P56
P55
P54
INT7
INT0
P53
P52
P51
P50
OSCOUT
V
SS
OSCIN
RESET
P37/T1OUTB
P36/T1INB
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Name
P35/T1OUTA
P34/T1INA
P33/T0OUTB
P32/T0INB
P31/T0OUTA
P30/P/D/T0INA
P17/A15
P16/A14
P15/A13
P14/A12
P13/A11
P12/A10
P11/A9
P10/A8
P00/A0/D0
P01/A1/D1
P02/A2/D2
Pin
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
Name
P70/SIN
P71/SOUT
P72/CLKOUT
/TXCLK/INT4
P73/ADTRG
/RXCLK/INT5
P74/P/D/INT6
P75/WAIT
P76/WDOUT
/BUSREQ
P77/WDIN
/BUSACK
R/W
DS
AS
V
DD
P07/A7/D7
P06/A6/D6
P05/A5/D5
P04/A4/D4
P03/A3/D3
Pin
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
Name
AV
SS
AV
DD
P47/AIN7
P46/AIN6
P45/AIN5
P43/AIN3
P42/AIN2
P41/AIN1
P40/AIN0
P27/RRDY5
P26/INT3
/RDSTB5/P/D
P25/WRRDY5
P24/INT1
/WRSTB5
P23/SDO
P22/INT2/SCK
P21/SDI/P/D
P20/NMI
4/56
®
ST9040
1.1GENERAL DESCRIPTION
The ST9040 is a ROM member of the ST9 family of
microcontrollers, completely developed and pro-
duced by SGS-THOMSON Microelectronics using
a proprietary n-well HCMOS process.
The ST9040 peripheral and functional actions are
fully compatible throughout the ST903x/4x family.
This datasheet will thus provide only information
specific to this ROM device.
THE READER IS ASKED TO REFER TO THE
DATASHEET OF THE ST9036 ROM-BASED DE-
VICE FOR FURTHER DETAILS.
The nucleus of the ST9040 is the advanced Core
which includes the Central Processing Unit (CPU),
the Register File, a 16 bit Timer/Watchdog with 8
bit Prescaler, a Serial Peripheral Interface support-
ing S-bus, I
2
C-bus and IM-bus Interface,plus two 8
bit I/O ports. The Core has independent memory
and register buses allowing a high degree of pipe-
lining to add to the efficiency of the code execution
speed of the extensive instruction set. The power-
ful I/O capabilities demanded by microcontroller
applications are fulfilled by the ST9040 with up to
56 I/O lines dedicated to digital Input/Output.
These lines are grouped into up to seven 8 bit I/O
Ports and can be configured on a bit basis under
software control to provide timing, status signals,
an address/databus for interfacing external mem-
ory, timer inputs and outputs, analog inputs, exter-
nal interrupts and serial or parallel I/O with or
without handshake.
Three basic memory spaces are available to support
this wide range of configurations: Program Memory
(internaland external), Data Memory (internaland ex-
ternal)andtheRegisterFile, which includesthecontrol
and status registers of theon-chip peripherals.
Two 16 bit MultiFunction Timers, each with an 8 bit
Prescaler and 13 operating modes allow simple
use for complex waveform generation and meas-
urement, PWM functions and many other system
timing functionsby the usage of the two associated
DMA channels for each timer. In addition there is
an 8 channel Analog to Digital Converter with inte-
gral sample and hold, fast 11µs conversion time
and 8 bit resolution. An Analog Watchdog feature
is included for two input channels.
Completing the device is a full duplex Serial Com-
munications Interface with an integral 110 to
375,000 baud rate generator, asynchronous and
1.5Mbyte/s synchronous capability (fully program-
mable format) and associated address/wake-up
option, plus two DMA channels.
5/56
®
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