ST95P02
SERIAL ACCESS SPI BUS 2K (256 x 8) EEPROM
NOT FOR NEW DESIGN
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
SINGLE 3V to 5.5V SUPPLY VOLTAGE
SPI BUS COMPATIBLE SERIAL INTERFACE
2 MHz CLOCK RATE MAX
BLOCK WRITE PROTECTION
STATUS REGISTER
16 BYTE PAGE MODE
WRITE PROTECT
SELF-TIMED PROGRAMMING CYCLE
E.S.D.PROTECTION GREATER than 4000V
The ST95P02 will be replaced shortly by the
updated version ST95020
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
Figure 1. Logic Diagram
DESCRIPTION
The ST95P02 is a 2K bit Electrically Erasable
Programmable Memory (EEPROM) fabricated with
SGS-THOMSON’s High Endurance Single Polysili-
con CMOS technology. The 2K bit memory is or-
ganised as 16 pages of 16 bytes. The memory is
accessed by a simple SPI bus compatible serial
interface. The bus signals are a serial clock input
(C), a serial data input (D) and a serial data output
(Q). The device connected to the bus is selected
when the chip select input (S) goes low. Commu-
nications with the chip can be interrupted with a
hold input (HOLD). The write operation is disabled
by a write protect input (W).
Table 1. Signal Names
C
D
Q
S
W
HOLD
V
CC
V
SS
Serial Clock
Serial Data Input
Serial Data Output
Chip Select
Write Protect
Hold
Supply Voltage
Ground
VCC
D
C
S
W
HOLD
ST95P02
Q
VSS
AI01256
June 1996
1/16
ST95P02
Figure 2A. DIP Pin Connections
Figure 2B. SO Pin Connections
ST95P02
S
Q
W
VSS
1
2
3
4
8
7
6
5
AI01257
ST95P02
VCC
HOLD
C
D
S
Q
W
VSS
1
2
3
4
8
7
6
5
AI01258B
VCC
HOLD
C
D
Table 2. Absolute Maximum Ratings
(1)
Symbol
T
A
T
STG
T
LEAD
V
O
V
I
V
CC
V
ESD
Parameter
Ambient Operating Temperature
Storage Temperature
Lead Temperature, Soldering
Output Voltage
Input Voltage
Supply Voltage
Electrostatic Discharge Voltage (Human Body model)
(2)
Electrostatic Discharge Voltage (Machine model)
(3)
(SO8 package)
(PSDIP8 package)
40 sec
10 sec
Value
–40 to 85
–65 to 150
215
260
–0.3 to V
CC
+0.6
–0.3 to 6.5
–0.3 to 6.5
4000
500
Unit
°C
°C
°C
V
V
V
V
V
Notes:
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and
other relevant quality documents.
2. MIL-STD-883C, 3015.7 (100pF, 1500Ω)
3. EIAJ IC-121 (Condition C) (200pF, 0Ω)
SIGNALS DESCRIPTION
Serial Output (Q).
The output pin is used to trans-
fer data serially out of the ST95P02. Data is shifted
out on the falling edge of the serial clock.
Serial Input (D).
The input pin is used to transfer
data serially into the device. It receives instructions,
addresses, and data to be written. Input is latched
on the rising edge of the serial clock.
Serial Clock (C).
The serial clock provides the
timing of the serial interface. Instructions, ad-
dresses, or data present at the input pin are latched
on the rising edge of the clock input, while data on
the Q pin changes after the falling edge of the clock
input.
Chip Select (S).
This input is used to select the
ST95P02. The chip is selected by a high to low
transition on the S pin when C is at ’0’ state. At any
time, the chip is deselected by a low to high transi-
tion on the S pin when C is at ’0’ state. As soon as
the chip is deselected, the Q pin is at high imped-
ance state. This pin allows multiple ST95P02 to
share the same SPI bus. After power up, the chip
is at the deselect state. Transitions of S are ignored
when C is at ’1’ state.
2/16
ST95P02
AC MEASUREMENT CONDITIONS
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing
Reference Voltages
≤
50ns
0.2V
CC
to 0.8V
CC
0.3V
CC
to 0.7V
CC
Figure 4. AC Testing Input Output Waveforms
0.8VCC
0.7VCC
0.3VCC
AI00825
Note that Output Hi-Z is defined as the point where data
is no longer driven.
0.2VCC
Table 3. Input Parameters
(1)
(T
A
= 25
°C,
f = 1 MHz )
Symbol
C
IN
C
IN
t
LPF
Parameter
Input Capacitance (D)
Input Capacitance (other pins)
Input Signal Pulse Width
Min
Max
8
6
10
Unit
pF
pF
ns
Note:
1. Sampled only, not 100% tested.
Table 4. DC Characteristics
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 3V to 5.5V)
Symbol
I
LI
I
LO
I
CC
Parameter
Input Leakage Current
Output Leakage Current
V
CC
Supply Current (Active)
C = 0.1 V
CC
/0.9 V
CC
,
@ 2 MHz, Q = Open
S = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
= 5.5V
S = V
CC
, V
IN
= V
SS
or V
CC
,
V
CC
= 3V
V
IL
V
IH
V
OL
V
OH
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2mA
I
OH
= –2mA
0.8 V
CC
– 0.3
0.7 V
CC
Test Condition
Min
Max
2
±2
2
50
10
0.3 V
CC
V
CC
+ 1
0.2 V
CC
Unit
µA
µA
mA
µA
µA
V
V
V
V
I
CC1
V
CC
Supply Current (Standby)
4/16
ST95P02
Table 5. AC Characteristics
(T
A
= 0 to 70°C or –40 to 85°C; V
CC
= 3V to 5.5V)
Symbol
f
C
t
SLCH
t
CLSH
t
CH
t
CL
t
CLCH
t
CHCL
t
DVCH
t
CHDX
t
DLDH
t
DHDL
t
HXCH
t
CLHX
t
SHSL
t
SHQZ
t
QVCL
t
CLQX
t
QLQH
t
QHQL
t
HHQX
t
HLQZ
t
W
(1)
Alt
f
C
t
SU
t
SH
t
WH
t
WL
t
RC
t
FC
t
DSU
t
DH
t
RI
t
FI
t
HSU
t
HH
t
CS
t
DIS
t
V
t
HO
t
RO
t
FO
t
LZ
t
HZ
t
W
Parameter
Clock Frequency
S Setup Time
S Hold Time
Clock High Time
Clock Low Time
Clock Rise Time
Clock Fall Time
Data In Setup Time
Data In Hold Time
Data In Rise Time
Data In Fall Time
HOLD Setup Time
HOLD Hold Time
S Deselect Time
Output Disable Time
Clock Low to Output Valid
Output Hold Time
Output Rise Time
Output Fall Time
HOLD High to Output Low-Z
HOLD Low to Output High-Z
Write Cycle Time
Test Condition
Min
D.C.
50
50
200
300
Max
2
Unit
MHz
ns
ns
ns
ns
1
1
50
50
1
1
50
50
4.5V < V
CC
< 5.5V
3V < V
CC
< 4.5V
200
250
150
300
0
100
100
150
150
10
µs
µs
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Note:
1. Not enough characterisation data were available on this parameter at the time of issue this Data Sheet. The typical value is well
below 5ms, the maximum value will be reviewed and lowered when sufficient data is available.
5/16
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