STP4NC80Z - STP4NC80ZFP
STB4NC80Z - STB4NC80Z-1
N-CHANNEL 800V - 2.4Ω - 4A TO-220/FP/D
2
PAK/I
2
PAK
Zener-Protected PowerMESH™III MOSFET
TYPE
STP4NC80Z/FP
STB4NC80Z/-1
s
s
V
DSS
800V
800V
R
DS(on)
< 2.8
Ω
< 2.8
Ω
I
D
4A
4A
1
3
s
s
s
TYPICAL R
DS
(on) = 2.4
Ω
EXTREMELY HIGH dv/dt AND CAPABILITY
GATE-TO- SOURCE ZENER DIODES
100% AVALANCHE TESTED
VERY LOW GATE INPUT RESISTANCE
GATE CHARGE MINIMIZED
D
2
PAK
1
3
2
TO-220
TO-220FP
DESCRIPTION
The third generation of MESH OVERLAY™ Power
MOSFETs for very high voltage exhibits unsurpassed
on-resistance per unit area while integrating back-to-
back Zener diodes between gate and source. Such ar-
rangement gives extra ESD capability with higher rug-
gedness performance as requested by a large variety
of single-switch applications.
APPLICATIONS
SINGLE-ENDED SMPS IN MONITORS,
COMPUTER AND INDUSTRIAL APPLICATION
s
WELDING EQUIPMENT
s
I PAK
(Tabless TO-220)
2
12
3
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
(
q
)
P
TOT
I
GS
V
ESD(G-S)
dv/dt(1)
V
ISO
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuos) at T
C
= 25°C
Drain Current (continuos) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Gate-source Current
Gate source ESD(HBM-C=100pF, R=15KΩ)
Peak Diode Recovery voltage slope
Insulation Winthstand Voltage (DC)
Storage Temperature
Max. Operating Junction Temperature
--
–65 to 150
150
4
2.5
16
100
0.8
±50
2.5
3
2000
Value
STP(B)4NC80Z(-1)
800
800
± 25
4(*)
2.5(*)
16(*)
35
0.28
STP4NC80ZFP
V
V
V
A
A
A
W
W/°C
mA
KV
V/ns
V
°C
°C
Unit
(•)Pulse width limited by safe operating area
December 2002
(1)I
SD
≤4A,
di/dt
≤100A/µs,
V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX
.
(*)Pulse width Limited by maximum temperature allowed
1/13
STP4NC80Z - STP4NC80ZFP - STB4NC80Z - STB4NC80Z-1
THERMAL DATA
TO-220 / D
2
PAK /
I
2
PAK
Rthj-case
Rthj-amb
T
l
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
1.25
30
300
TO-220FP
3.57
°C/W
°C/W
°C
AVALANCHE CHARACTERISTICS
Symbol
I
AR
E
AS
Parameter
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
Single Pulse Avalanche Energy
(starting T
j
= 25 °C, I
D
= I
AR
, V
DD
= 50 V)
Max Value
4
225
Unit
A
mJ
ELECTRICAL CHARACTERISTICS
(TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V
(BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Conditions
I
D
= 250 µA, V
GS
= 0
I
D
= 1 mA, V
GS
= 0
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 °C
V
GS
= ±20V
Min.
800
0.9
1
50
±10
Typ.
Max.
Unit
V
V/°C
µA
µA
µA
∆BV
DSS
/∆T
J
Breakdown Voltage Temp.
Coefficient
I
DSS
I
GSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
Gate-body Leakage
Current (V
DS
= 0)
ON (1)
Symbol
V
GS(th)
R
DS(on)
Parameter
Gate Threshold Voltage
Static Drain-source On
Resistance
Test Conditions
V
DS
= V
GS
, I
D
= 250µA
V
GS
= 10V, I
D
= 2 A
Min.
3
Typ.
4
2.4
Max.
5
2.8
Unit
V
Ω
DYNAMIC
Symbol
g
fs
(1)
C
iss
C
oss
C
rss
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
V
DS
> I
D(on)
x R
DS(on)max,
I
D
= 2A
V
DS
= 25V, f = 1 MHz, V
GS
= 0
Min.
Typ.
4
1200
90
11
Max.
Unit
S
pF
pF
pF
2/13
STP4NC80Z - STP4NC80ZFP - STB4NC80Z - STB4NC80Z-1
ELECTRICAL CHARACTERISTICS
(CONTINUED)
SWITCHING ON
Symbol
t
d(on)
t
r
Q
g
Q
gs
Q
gd
Parameter
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
V
DD
= 400 V, I
D
= 2 A
R
G
= 4.7Ω V
GS
= 10V
(see test circuit, Figure 3)
V
DD
= 640V, I
D
= 4A,
V
GS
= 10V
Min.
Typ.
27
10
27
7
10
36.5
Max.
Unit
ns
ns
nC
nC
nC
SWITCHING OFF
Symbol
t
r(Voff)
t
f
t
c
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
V
DD
= 640V, I
D
= 4 A,
R
G
= 4.7Ω, V
GS
= 10V
(see test circuit, Figure 5)
Min.
Typ.
11
10
24
Max.
Unit
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
I
SD
I
SDM
(2)
V
SD
(1)
t
rr
Q
rr
I
RRM
Parameter
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 4 A, V
GS
= 0
I
SD
= 4 A, di/dt = 100A/µs,
V
DD
= 50V, T
j
= 150°C
(see test circuit, Figure 5)
560
3.4
13
Test Conditions
Min.
Typ.
Max.
4
16
1.6
Unit
A
A
V
ns
µC
A
GATE-SOURCE ZENER DIODE
Symbol
BV
GSO
αT
Rz
Parameter
Gate-Source Breakdown
Voltage
Voltage Thermal Coefficient
Dynamic Resistance
Test Conditions
Igs=± 1mA (Open Drain)
T=25°C Note(3)
I
D
= 50 mA,
Min.
25
1.3
90
Typ.
Max.
Unit
V
10
-4
/°C
Ω
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3.
∆V
BV
=
αT
(25°-T) BV
GSO
(25°)
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally
be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient
and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid
the usage of external components.
3/13
STP4NC80Z - STP4NC80ZFP - STB4NC80Z - STB4NC80Z-1
Safe Operating Area For TO-220/D²PAK/I²PAK
Safe Operating Area For TO-220FP
Thermal Impedance For TO-220/D²PAK/I²PAK
Thermal Impedance For TO-220FP
Output Characteristics
Transfer Characteristics
4/13
STP4NC80Z - STP4NC80ZFP - STB4NC80Z - STB4NC80Z-1
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs Temp.
Normalized On Resistance vs Temperature
5/13
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