CMOS Power Consumption
and C
pd
Calculation
SCAA035B
June 1997
1
IMPORTANT NOTICE
Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to obtain the latest
version of relevant information to verify, before placing orders, that the information being relied
on is current.
TI warrants performance of its semiconductor products and related software to the specifications
applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality
control techniques are utilized to the extent TI deems necessary to support this warranty.
Specific testing of all parameters of each device is not necessarily performed, except those
mandated by government requirements.
Certain applications using semiconductor products may involve potential risks of death,
personal injury, or severe property or environmental damage (“Critical Applications”).
TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES
OR SYSTEMS OR OTHER CRITICAL APPLICATIONS.
Inclusion of TI products in such applications is understood to be fully at the risk of the customer.
Use of TI products in such applications requires the written approval of an appropriate TI officer.
Questions concerning potential risk applications should be directed to TI through a local SC
sales office.
In order to minimize risks associated with the customer’s applications, adequate design and
operating safeguards should be provided by the customer to minimize inherent or
procedural hazards.
TI assumes no liability for applications assistance, customer product design, software
performance, or infringement of patents or services described herein. Nor does TI warrant or
represent that any license, either express or implied, is granted under any patent right, copyright,
mask work right, or other intellectual property right of TI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
Copyright
©
1997, Texas Instruments Incorporated
2
Contents
Title
Page
Introduction
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Power-Consumption Components
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Static Power Consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
Dynamic Power Consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Transient Power Consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Capacitive-Load Power Consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
Power-Dissipation Capacitance (C
pd
) in CMOS Circuits
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Testing Considerations
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test Conditions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Calculating C
pd
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
C
pd
Measurement Procedures
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Determination of C
pd
(Laboratory Testing)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5
6
6
6
7
Comparison of Supply Current Versus Frequency
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
Power Economy
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Conclusion
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
Acknowledgment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
List of Illustrations
Figure
1
2
3
4
5
6
7
8
Title
Page
CMOS Inverter Mode for Static Power Consumption
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Model Describing Parasitic Diodes Present in CMOS Inverter
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Hex Inverter AHC04
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
Several Circuits Switching, AHC374
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
I
CC
vs Frequency for AHC00
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
Input Waveform
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8
Power Consumption With All Outputs Switching
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
Power Consumption With a Single Output Switching
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
iii
Introduction
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power
was a major driving force behind the development of CMOS technologies. As a result, CMOS devices are best known for low
power consumption. However, for minimizing the power requirements of a board or a system, simply knowing that CMOS
devices may use less power than equivalent devices from other technologies does not help much. It is important to know not only
how to calculate power consumption, but also to understand how factors such as input voltage level, input rise time,
power-dissipation capacitance, and output loading affect the power consumption of a device. This application report addresses
the different types of power consumption in a CMOS logic circuit, focusing on calculation of power-dissipation capacitance
(C
pd
), and, finally, the determination of total power consumption in a CMOS device.
The main topics discussed are:
•
Power-consumption components
•
Static power consumption
•
Dynamic power consumption
•
Power-dissipation capacitance (C
pd
) in CMOS circuits
•
C
pd
comparison among different families
•
Power economy
•
Conclusion
Power-Consumption Components
High frequencies impose a strict limit on power consumption in computer systems as a whole. Therefore, power consumption
of each device on the board should be minimized. Power calculations determine power-supply sizing, current requirements,
cooling/heatsink requirements, and criteria for device selection. Power calculations also can determine the maximum reliable
operating frequency.
Two components determine the power consumption in a CMOS circuit:
•
Static power consumption
•
Dynamic power consumption
CMOS devices have very low static power consumption, which is the result of leakage current. This power consumption occurs
when all inputs are held at some valid logic level and the circuit is not in charging states. But, when switching at a high frequency,
dynamic power consumption can contribute significantly to overall power consumption. Charging and discharging a capacitive
output load further increases this dynamic power consumption.
This application report addresses power consumption in CMOS logic families (5 V and 3.3 V) and describes the methods for
evaluating both static and dynamic power consumption. Additional information is also presented to help explain the causes of
power consumption, and present possible solutions to minimize power consumption in a CMOS system.
Static Power Consumption
Typically, all low-voltage devices have a CMOS inverter in the input and output stage. Therefore, for a clear understanding of
static power consumption, refer to the CMOS inverter modes shown in Figure 1.
1
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
