®
RT8231C
Complete DDR Memory Power Supply Controller
General Description
The RT8231C provides a complete power supply for DDR2/
DDR3/DDR3L/LPDDR3/DDR4/LPDDR4 memory
systems. It integrates a synchronous PWM Buck
controller with a 1.5A sink/source tracking linear regulator
and buffered low noise reference.
The PWM controller provides the low quiescent current,
high efficiency, excellent transient response, and high DC
output accuracy needed for stepping down high-voltage
batteries to generate low-voltage chipset RAM supplies
in notebook computers. The constant on-time PWM
control scheme handles wide input/output voltage ratios
with ease and provides 100ns
“instant-on”
response to
load transients while maintaining a relatively constant
switching frequency.
The RT8231C achieves high efficiency at a reduced cost
by eliminating the current-sense resistor found in
traditional current mode PWMs. Efficiency is further
enhanced by its ability to drive very large synchronous
rectifier MOSFETs. The Buck conversion allows this device
to directly step down high-voltage batteries for the highest
possible efficiency.
The 1.5A sink/source LDO maintains fast transient
response only requiring a 10μF ceramic output capacitor.
In addition, the LDO supply input is available externally
to significantly reduce the total power losses. The
RT8231C supports all of the sleep state controls placing
VTT at high-Z in S3 and discharging VDDQ, VTT and
VTTREF (soft-off) in S4/S5.
The RT8231C provides protections including OVP, UVP,
and thermal shutdown. The RT8231C is available in the
WQFN-20L 3x3 package.
Applications
DDR2/DDR3/DDR3L/LPDDR3/DDR4/LPDDR4 Memory
Power Supplies
Notebook Computers
SSTL18, SSTL15 and HSTL Bus Termination
Pin Configuration
(TOP VIEW)
VTT
VLDOIN
BOOT
UGATE
PHASE
20 19 18 17 16
VTTGND
VTTSNS
GND
VTTREF
VDDQ
1
2
3
4
5
6
7
8
9 10
15
14
GND
21
13
12
11
LGATE
PGND
CS
VDD
VID
WQFN-20L 3x3
Simplified Application Circuit
V
IN
V
VDD
VDD
RT8231C
TON
UGATE
BOOT
PHASE
LGATE
FB
VTTREF
VDDQ
GND
VLDOIN
V
VDDQ
PGOOD
V
TT
PGOOD
VTT
VTTSNS
CS
S3
S5
VID
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS8231C-01 March 2019
FB
S3
S5
TON
PGOOD
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1
RT8231C
Features
Ordering Information
RT8231C
Package Type
QW : WQFN-20L 3x3 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
½
PWM Controller
½
Adjustable Current Limit with Low-Side R
DS(ON)
Sensing
½
Low Quiescent Supply Current
½
Quick Load-Step Response within 100ns
½
1% V
VDDQ
Accuracy Over Line and Load
½
Adjustable 0.675V to 3.3V Output Range for 1.8V
(DDR2), 1.5V (DDR3), 1.35V (DDR3L), 1.2V (LPDDR3),
1.2V (DDR4) and 1.1V (LPDDR4)
½
4.5V to 26V Battery Input Range
Resistor Adjustable Frequency
½
Over-/Under-Voltage Protection
½
Internal Voltage Ramp Soft-Start
½
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
½
Drives Large Synchronous Rectifier MOSFETs
½
Power Good Indicator
1.5A LDO (VTT), Buffered Reference (VTTREF)
½
Marking Information
24= : Product Code
Capable to Sink and Source Up to 1.5A
½
LDO Input Available to Optimize Power Losses
μ
½
Requires Only 10μF Ceramic Output Capacitor
½
Integrated Divider Tracks 1/2 VDDQ for both VTT
and VTTREF
½
Accuracy
±
20mV for both VTTREF and VTT
½
Supports High-Z in S3 and Soft-Off in S4/S5
RoHS Compliant and Halogen Free
½
24=YM
DNN
YMDNN : Date Code
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS8231C-01 March 2019
RT8231C
Functional Pin Description
Pin No.
1
2
3, 21
(Exposed Pad)
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
S3
S5
TON
PGOOD
VID
VDD
CS
PGND
LGATE
PHASE
UGATE
BOOT
VLDOIN
VTT
Power ground for the VTT LDO.
Voltage sense input for the VTT LDO. Connect to the terminal of the VTT_LDO
output capacitor.
The exposed pad must be soldered to a large PCB and connected to GND for
maximum power dissipation.
VTTREF buffered reference output.
Reference input for VTT and VTTREF.
Feedback voltage input. Connect to a resistive voltage divider from VDDQ to
GND to adjust the output voltage.
VTT LDO enable control input. Do not leave this pin floating.
PWM enable control input. Do not leave this pin floating.
Set the UGATE on-time through a pull-up resistor connecting to VIN.
Power good open-drain output. In high state when VDDQ output voltage is within
the target range.
Internal reference voltage setting.
Supply voltage input for the analog supply and LGATE gate driver.
Current limit threshold setting input. Connect to GND through the voltage setting
resistor.
Power ground for low-side MOSFET.
Low-side gate driver output for VDDQ.
Switch node. External inductor connection for VDDQ and behave as the current
sense comparator input for low-side MOSFET R
DS(ON)
sensing.
High-side gate driver output for VDDQ.
Bootstrap supply for high-side gate driver.
Power supply for VTT LDO.
Power output for the VTT LDO.
Pin Function
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS8231C-01 March 2019
www.richtek.com
3
RT8231C
Functional Block Diagram
Buck Controller
TRIG
VDDQ
TON
On-Time
1-SHOT
V
REF
+
+
-
Comp
R
S
Q
UGATE
PHASE
+
-
+
0.45V
-
OV
Latch
S1
Q
Latch
S1
Q
DEM
5µA
1/10
CS
Min. T
OFF
TRIG
VDD
LGATE
PGND
-
+
BOOT
115%V
REF
FB
UV
85% V
REF
SS Int
SS Timer
Thermal
Shutdown
Reference
Voltage
Selector
V
REF
+
-
S5
VDD
VID
PGOOD
VTT LDO
VDDQ
S5
S3
Tracking
Discharge
Thermal
Shutdown
+
-
+
-
VTTREF
VLDOIN
GND
VTTSNS
+
-
VTT
+
-
VTTGND
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
4
DS8231C-01 March 2019
RT8231C
Operation
The RT8231C is a constant on-time synchronous step-
down controller. In normal operation, the high-side
N-MOSFET is turned on when the output voltage is lower
than VREF, and is turned off after the internal one-shot
timer expires. While the high-side N-MOSFET is turned
off, the low-side N-MOSFET is turned on to conduct the
inductor current until next cycle begins.
Soft-Start (SS)
For internal soft-start function, an internal current source
charges an internal capacitor to build the soft-start ramp
voltage. The output voltage will track the internal ramp
voltage during soft-start interval.
PGOOD
The power good output is an open-drain architecture. When
the soft-start is finished, the PGOOD open-drain output
will be high impedance.
Current Limit
The current limit circuit employs a unique
“valley”
current
sensing algorithm. If the magnitude of the current sense
signal at PHASE is above the current limit threshold, the
PWM is not allowed to initiate a new cycle. The current
limit threshold can be set with an external voltage setting
resistor on the CS pin.
Over-Voltage Protection (OVP) & Under-Voltage
Protection (UVP)
The output voltage is continuously monitored for over-
voltage and under-voltage protection. When the output
voltage exceeds its set voltage threshold( 115% of V
OUT
),
UGATE goes low and LGATE is forced high. When the
feedback voltage is less than 0.45V, under-voltage
protection is triggered and then both UGATE and LGATE
gate drivers are forced low. The controller is latched until
VDD is re-supplied and exceeds the POR rising threshold
voltage or S5 is reset.
VTT Linear Regulator and VTTREF
This VTT linear regulator employs ultimate fast response
feedback loop so that small ceramic capacitors are enough
for keeping track of VTTREF within 40mV at all conditions,
including fast load transient. The VTTREF block consists
of on-chip 1/2 divider, LPF and buffer. This regulator also
has sink and source capability up to 10mA. Bypass
VTTREF to GND with a 33nF ceramic capacitor for stable
operation.
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS8231C-01 March 2019
www.richtek.com
5