HI-8444, HI-8445, HI-8448
May 2010
Quad / Octal
ARINC 429 Line Receivers
PIN CONFIGURATIONS
(See page 6 for additional pin configurations)
DESCRIPTION
The HI-8444 and HI-8445 are quad ARINC 429 line
receiver ICs available in a 20-pin TSSOP package. The HI-
8448 contains 8 independent ARINC 429 line receivers.
The technology is analog / digital CMOS. The device is
designed to operate from either a 5V or 3.3V supply. Each
receiver channel translates incoming ARINC 429 data bus
signals to a pair of TTL / CMOS outputs.
The optional HI-8444-10, HI-8445-10 and HI-8448-10 are
designed to be used with an external 15 Kohm series
resistor. The “-10” devices meet the lightning protection
requirements of DO-160E, level 3, waveforms 3, 4, 5A, and
5B.
The TESTA and TESTB inputs bypass the analog inputs for
testing purposes. They force the receiver outputs to the
specified ZERO, ONE or NULL state. The ARINC inputs
are ignored when the device is in the test mode.
The HI-8445 is identical to the HI-8444 except the TESTA
and TESTB pins are not available.
IN1 A
IN1 B
IN2 A
IN2 B
TESTA (8444 only)
TESTB (8444 only)
IN3 A
IN3 B
IN4 A
IN4 B
1
2
3
4
5
6
7
8
9
10
20
HI-8444PS
HI-8444PS-10
&
HI-8445PS
HI-8445PS-10
Quad
Receiver
19
18
17
16
15
14
13
12
11
OUT1 A
OUT1 B
OUT2 A
OUT2 B
VDD
VSS
OUT3 A
OUT3 B
OUT4 A
OUT4 B
20 Pin Plastic TSSOP package
FEATURES
!
!
!
!
!
Direct ARINC 429 quad or octal line receivers in small
footprint packages
3.3V or 5.0V single supply operation
Test inputs bypass analog inputs and force digital
outputs to a one, zero, or null state
ARINC inputs are internally lightning protected per DO-
160E level 3 (-10 configuration only)
Hi-Rel processing options available
IN1 AX
IN1 BX
IN1 AY
IN1 BY
IN2 AX
IN2 BX
IN2 AY
IN2 BY
TESTA (X)
TESTB (X)
TESTA (Y)
TESTB (Y)
IN3 AX
IN3 BX
IN3 AY
IN3 BY
IN4 AX
IN4 BX
IN4 AY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
HI-8448PS
HI-8448PS-10
Octal
Receiver
31
30
29
28
27
26
25
24
23
22
21
20
FUNCTION TABLE
ARINC INPUTS TESTA TESTB OUTA OUTB
INA - INB
-2.5 to +2.5 V
< -6.5 V
> +6.5 V
X
X
X
0
0
0
0
1
1
0
0
0
1
0
1
0
0
1
0
1
0
0
1
0
1
0
0
OUT1 AX
OUT1 BX
OUT1 AY
OUT1 BY
OUT2AX
OUT2 BX
OUT2 AY
OUT2 BY
VDD
VSS
OUT3 AX
OUT3 BX
OUT3 AY
OUT3 BY
OUT4 AX
OUT4 BX
OUT4 AY
OUT4 BY
IN4 BY
38 Pin Plastic TSSOP package
(DS8444 Rev. H)
HOLT INTEGRATED CIRCUITS
www.holtic.com
05/10
HI-8444, HI-8445, HI-8448
BLOCK DIAGRAMS
IN1 AX
IN1 BX
IN2 AX
IN2 BX
IN3 AX
IN3 BX
IN4 AX
IN4 BX
IN1 A
IN1 B
IN2 A
IN2 B
IN3 A
IN3 B
IN4 A
IN4 B
OUT1 A
OUT1 B
OUT2 A
OUT2 B
OUT3 A
OUT3 B
OUT4 A
OUT4 B
TESTA(X)
TESTB(X)
TESTA(Y)
TESTB(Y)
IN1 AY
IN1 BY
IN2 AY
IN2 BY
IN3 AY
IN3 BY
IN4 AY
IN4 BY
OUT1 AY
OUT1 BY
OUT2 AY
OUT2 BY
OUT3 AY
OUT3 BY
OUT4 AY
OUT4 BY
OUT1 AX
OUT1 BX
OUT2 AX
OUT2 BX
OUT3 AX
OUT3 BX
AX
OUT4 A
BX
OUT4 B
IN1 A
IN1 B
IN2 A
IN2 B
IN3 A
IN3 B
IN4 A
IN4 B
OUT1 A
OUT1 B
OUT2 A
OUT2 B
OUT3 A
OUT3 B
OUT4 A
OUT4 B
TESTA
TESTB
HI-8444
HI-8445
HI-8448
PIN DESCRIPTIONS (HI-8444, HI-8445)
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SYMBOL
IN1 A
IN1 B
IN2 A
IN2 B
TESTA
TESTB
IN3 A
IN3 B
IN4 A
IN4 B
OUT4 B
OUT4 A
OUT3 B
OUT3 A
VSS
VDD
OUT2 B
OUT2 A
OUT1 B
OUT1 A
FUNCTION
ARINC input
ARINC input
ARINC input
ARINC input
Logic input
Logic input
ARINC input
ARINC input
ARINC input
ARINC input
Logic output
Logic output
Logic output
Logic output
Power
Power
Logic output
Logic output
Logic output
Logic output
Receiver 1 positive input
Receiver 1 negative input
Receiver 2 positive input
Receiver 2 negative input
DESCRIPTION
Test input. (Not available on HI-8445)
Test input. (Not available on HI-8445)
Receiver 3 positive input
Receiver 3 negative input
Receiver 4 positive input
Receiver 4 negative input
Receiver 4 "ZERO" output
Receiver 4 "ONE" output
Receiver 3 "ZERO" output
Receiver 3 "ONE" output
Ground
Positive supply voltage 3.3V or 5.0 V
Receiver 2 "ZERO" output
Receiver 2 "ONE" output
Receiver 1 "ZERO" output
Receiver 1 "ONE" output
HOLT INTEGRATED CIRCUITS
2
HI-8444, HI-8445, HI-8448
PIN DESCRIPTIONS (HI-8448)
PIN
IN1 AX
IN1 BX
IN1 AY
IN1 BY
IN2 AX
IN2 BX
IN2 AY
IN2 BY
TESTA(X)
TESTB(X)
TESTA(Y)
TESTB(Y)
IN3 AX
IN3 BX
IN3 AY
IN3 BY
IN4 AX
IN4 BX
IN4 AY
IN4 BY
OUT4 BY
OUT4 AY
OUT4 BX
OUT4 AX
OUT3 BY
OUT3 AY
OUT3 BX
OUT3 AX
VSS
VDD
OUT2 BY
OUT2 AY
OUT2 BX
OUT2 AX
OUT1 BY
OUT1 AY
OUT1 BX
OUT1 AX
FUNCTION
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
Logic input
Logic input
Logic input
Logic input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
ARINC input
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
Power
Power
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
Logic output
RECEIVER SET
X
X
Y
Y
X
X
Y
Y
X
X
Y
Y
X
X
Y
Y
X
X
Y
Y
Y
Y
X
X
Y
Y
X
X
DESCRIPTION
Receiver 1 positive input
Receiver 1 negative input
Receiver 1 positive input
Receiver 1 negative input
Receiver 2 positive input
Receiver 2 negative input
Receiver 2 positive input
Receiver 2 negative input
Test input
Test input
Test input
Test input
Receiver 3 positive input
Receiver 3 negative input
Receiver 3 positive input
Receiver 3 negative input
Receiver 4 positive input
Receiver 4 negative input
Receiver 4 positive input
Receiver 4 negative input
Receiver 4 "ZERO" output
Receiver 4 "ONE" output
Receiver 4 "ZERO" output
Receiver 4 "ONE" output
Receiver 3 "ZERO" output
Receiver 3 "ONE" output
Receiver 3 "ZERO" output
Receiver 3 "ONE" output
Ground supply
Positive supply voltage 3.3V or 5.0 V
Y
Y
X
X
Y
Y
X
X
Receiver 2 "ZERO" output
Receiver 2 "ONE" output
Receiver 2 "ZERO" output
Receiver 2 "ONE" output
Receiver 1 "ZERO" output
Receiver 1 "ONE" output
Receiver 1 "ZERO" output
Receiver 1 "ONE" output
HOLT INTEGRATED CIRCUITS
3
HI-8444, HI-8445, HI-8448
ABSOLUTE MAXIMUM RATINGS
Supply voltage (VDD)
Logic input voltage range
ARINC input voltage
Driver peak output current
Power dissipation at 25°C
Solder Temperature
Storage Temperature
-0.3 V to +7 V
-0.3 V to +5.5 V
-120 V to + 120 V
+1.0 A
350 mW
275°C for 10 sec
-65°C to +150°C
RECOMMENDED OPERATING CONDITIONS
Supply Voltage
VDD .................................. 3.0 V to 5.5 V
Operating Temperature Range
Industrial Screening .........
Hi-Temp Screening ........
-40°C to +85°C
-55°C to +125°C
NOTE: Stresses above absolute maximum ratings or
outside recommended operating conditions may cause
permanent damage to the device. These are stress
ratings only. Operation at the limits is not recommended.
ELECTRICAL CHARACTERISTICS
VDD = 5.0V ± 5% or 3.3V ± 5%, V
SS
= 0V, T
A
= Operating Temperature Range (unless or otherwise specified).
PARAMETER
ARINC INPUTS
Input voltage
ONE or ZERO
NULL
Common mode
Input resistance
Input hysteresis
Input capacitance
TEST INPUTS
Logic input voltage
Logic input current
OUTPUTS
Logic output voltage
High
Low
Logic output voltage (CMOS)
SUPPLY CURRENT
V
DD
current
SWITCHING CHARACTERISTICS (T
A
= 25 °C)
Propagation delay
Output rise time
Output fall time
Propagation delay
TEST to OUT
IN to OUT
High
Low
High
Low
Sink
Source
ARINC differential
ARINC single ended to V
SS
INA to INB
Input to V
SS
or V
DD
SYMBOL
V
DIN
V
NIN
V
COM
R
DIFF
R
SUP
V
HYS
C
AD
C
AS
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
V
OHC
V
OLC
I
DD
CONDITION
Differential input voltage
Differential input voltage
With respect to GND
Supplies floating
Supplies floating
MIN
6.5
TYP
10
MAX
13
2.5
±5.0
UNITS
V
V
V
K
W
K
W
V
30
19
0.5
75
40
1.0
5
10
10
pF
pF
V
2.0
0.8
V
IH
=2.0V
V
IL
=0.8V
I
OH
=-5mA, V
DD
=5.0V
I
OH
=-4mA, V
DD
=3.3V
I
OL
=5mA, V
DD
=5.0V
I
OL
=4mA, V
DD
=3.3V
I
OH
=-100µA
I
OL
=100µA
HI-8444, HI-8445
HI-8448
5.5
11
600
600
50
50
50
50
80
80
V
DD
-0.2
V
SS
+0.2
10
20.0
-1.0
2.4
2.4
0.4
0.4
200
V
µA
µA
V
V
V
V
V
V
mA
mA
ns
ns
ns
ns
ns
ns
t
LH
t
HL
t
R
t
F
t
TOH
t
TOL
C
L
=50 pF
C
L
=50 pF
10% to 90%
90% to 10%
HOLT INTEGRATED CIRCUITS
4
HI-8444, HI-8445, HI-8448
TIMING DIAGRAMS
IN A
TEST A
/
TEST B
IN B
t
LH
t
HL
t
LH
1.5V
t
HL
1.5V
t
TOH
t
TOL
OUT A
OUT A
/
OUT B
1.5V
OUT B
1.5V
ARINC 429 Receiver Timing
Test Mode Timing
INTERNAL LIGHTNING PROTECTION (-10 Only)
The HI-8444-10, HI-8445-10 and HI-8488-10 are similar to the
“non -10” configurations with the exception that an external
15 Kohm resistor must be added in series with each ARINC input
in order to properly detect the ARINC 429 specified input
thresholds. This option is especially useful in applications where
external lightning protection circuitry is required.
The HI-8444-10, HI-8445-10 and HI-8448-10 will meet the
requirements of DO-160E, Level 3, waveforms 3, 4, 5A and 5B
with the 15 Kohm series resistors in place.
Please refer to the Holt AN-300 Application Note for additional
information and recommendations on lightening protection of Holt
Line Drivers and Receivers.
HOLT INTEGRATED CIRCUITS
5
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