HI-3200, HI-3201
August 2013
AVIONICS DATA MANAGEMENT ENGINE /
ARINC 429 - CAN BUS BRIDGE
FEATURES
·
·
·
·
Eight ARINC 429 Receive channels
Four ARINC 429 Transmit channels
CAN Bus / ARINC 825 Interface
32KB on chip user-configurable data storage
memory
and CAN buses
GENERAL DESCRIPTION
The HI-3200 from Holt Integrated Circuits is a single chip
CMOS data management IC capable of managing, storing
and forwarding avionics data messages between eight
ARINC 429 receive channels, four ARINC 429 transmit
channels and a single CAN / ARINC 825 data bus.
The ARINC 429 and CAN buses may be operated inde-
pendently, allowing a host CPU to send and receive data
on multiple buses, or the HI-3200 can be programmed to
automatically re-format, re-label, re-packetize and re-
transmit data from ARINC 429 receive buses to ARINC
429 transmit buses, as well as from ARINC 429 to CAN or
CAN to ARINC 429.
A 32K x 8 on-board memory allows received data to be
logically organized and automatically updated as new
ARINC 429 labels or CAN frames are received.
An auto-initialization feature allows configuration informa-
tion to be up-loaded from an external EEPROM on reset to
facilitate rapid start-up or operation without a host CPU.
The HI-3200 interfaces directly with Holt’s HI-8448 octal
ARINC 429 receiver IC, HI-8596 or HI-8592 ARINC 429
line drivers and HI-3110 integrated CAN controller /
transceiver.
The HI-3201 is identical to the HI-3200 except it comes in
an 80-pin PQFP package with eight instead of two ARINC
429 bit monitor pins.
·
Programmable received data filtering for ARINC 429
·
Programmable transmission schedulers for periodic
ARINC 429 and CAN message broadcasting
·
Flexible protocol bridge ARINC 429 to CAN and
CAN to ARINC 429
·
SPI Host CPU interface
·
Auto-initialization feature allows power-on
configuration or independent operation without CPU
PIN CONFIGURATION
ARX2P
ARX1N
ARX1P
ARX0N
ARX0P
SCANEN
CMISO
READY
ESCLK
EMOSI
ECSB
EMISO
RUN
CCSB
ATXMSK
MRST
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
APPLICATION
CPU
ARINC 429
8 x Receive
HI-8448
AACK 1
CGP2 2
AINT 3
CSTAT 4
SCANSHIFT 5
ARX2N 6
ARX3P 7
VDD 8
GND 9
ARX3N 10
ARX4P 11
ARX4N 12
ARX5P 13
ARX5N 14
ARX6P 15
ARX6N 16
HI-3200PQI
&
HI-3200PQT
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
CMROUT
ATXSLP0
ATX0N
ATX0P
ATX1N
ATX1P
ATXSLP1
VDD
GND
COSC
ATXSLP2
ATX2N
ATX2P
ATX3N
ATX3P
ATXSLP3
HI-3110
CAN Bus
ARINC 429
4 x Transmit
HI-3200
64 - Pin Plastic Quad Flat Pack (PQFP)
(See ordering information for additional pin configurations)
(DS3200 Rev. D)
ARX7P
ARX7N
MODE0
CMOSI
MODE1
MCLK
MODE2
ARXBIT0
ARXBIT1
HMISO
HSCLK
HMOSI
HCSB
CSCLK
MINT
MINTACK
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
08/13
HI-3200, HI-3201
APPLICATION OVERVIEW
The HI-3200 is a flexible device for managing ARINC 429
and ARINC 825 communications and data storage in
many avionics applications. The device architecture
centers around a 32K x 8 static RAM used for data
storage, data filtering tables and table-driven
transmission schedulers. Once configured, the device
can operate autonomously without a host CPU, negating
the need for software development or DO-178
certification. Configuration data may be uploaded into the
device from an external EEPROM, following system
reset.
The device supports up to eight ARINC 429 receive
channels. Received data is stored in on-chip RAM
organized by channel number and label. The data table
continually updates as new labels arrive. Programmable
interrupts and filters alert the host subsystem to labels of
interest.
Each ARINC 429 receive channel also includes a 32
message deep FIFO allowing selected label data to be
queued for subsequent host access.
The HI-3200 includes four independent ARINC 429
transmit channels. Transmission may be controlled
entirely by an external CPU, or autonomously by
programming one or more of the four on-chip ARINC 429
transmit schedulers. These allow periodic transmission
to occur without CPU. Source data for transmission may
be selected from RAM based tables of constants and / or
from the received channel data. Powerful options exist for
constructing ARINC 429 labels as well as controlling their
timing and conditional transmission.
Even when running under the control of schedulers, the
host CPU may insert new labels for transmission at will.
The HI-3200 also supports ARINC 825 (CAN)
communication. An external HI-3110 CAN controller
automatically handles the CAN bus protocol and physical
interface. The HI-3200 configures the HI-3110 at system
initialization and manages all traffic to and from the CAN
bus.
As with ARINC 429, ARINC 825 received data may be
filtered and stored in on-chip RAM, organized by ID field
filters. ARINC 825 frame transmission may be directly
controlled by a host CPU or by an on-chip transmission
scheduler. CAN frames may be built and conditionally
transmitted using the scheduler’s flexible instruction set.
Source data for CAN frames can be from CPU, stored
constants or from received ARINC 429 data tables.
The following examples show eight possible
configurations of how the HI-3200 may be used:
Example 1. ARINC 429 Data reception using on-chip RAM
RECEIVER 7
Channel 7, Label FF
“
“
“
Channel 7, Label 01
Channel 7, Label 00
RECEIVER 6
Channel 6, Label FF
“
“
“
Channel 6, Label 01
Channel 6, Label 00
Channel 5, Label FF
“
“
“
Channel 5, Label 01
Channel 5, Label 00
RECEIVER 5
8 x ARINC 429
Receive Buses
RECEIVER 4
Channel 4, Label FF
“
“
“
Channel 4, Label 01
Channel 4, Label 00
Channel 3, Label FF
“
“
“
Channel 3, Label 01
Channel 3, Label 00
Channel 2, Label FF
“
“
“
Channel 2, Label 01
Channel 2, Label 00
ARINC 429
RECEIVE
INTERRUPT
TABLE
AINT
AACK
Host CPU
SPI
HCSB
HSCLK
HMOSI
HMISO
RECEIVER 3
RECEIVER 2
RECEIVER 1
Channel 1, Label FF
“
“
“
Channel 1, Label 01
Channel 1, Label 00
Channel 0, Label FF
“
“
“
Channel 0, Label 01
Channel 0, Label 00
RECEIVER 0
8K x 8 RAM
HI-3200
HOLT INTEGRATED CIRCUITS
3
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