DATA SHEET
µ
PD780031AY, 780032AY, 780033AY, 780034AY
8-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
µ
PD780031AY, 780032AY, 780033AY, and 780034AY are members of the
µ
PD780034AY Subseries of the
78K/0 Series. This is a
µ
PD780034A Subseries product with an added multimaster-supporting I
2
C bus interface, and
is suitable for AV equipment applications.
A flash memory version, the
µ
PD78F0034AY, that can operate in the same power supply voltage range as the mask
ROM version, and various development tools, are available.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µ
PD780024A, 780034A, 780024AY, 780034AY
Subseries User's Manual:
78K/0 Series User’s Manual Instructions:
U14046E
U12326E
FEATURES
• Internal ROM and RAM
Item
Part Number
Program Memory
(Internal ROM)
8 Kbytes
16 Kbytes
24 Kbytes
32 Kbytes
1024 bytes
Data Memory
(Internal High-Speed RAM)
512 bytes
Package
µ
PD780031AY
µ
PD780032AY
µ
PD780033AY
µ
PD780034AY
• 64-pin plastic shrink DIP (750 mils)
• 64-pin plastic QFP (14
×
14 mm)
• 64-pin plastic LQFP (12
×
12 mm)
• External memory expansion space: 64 Kbytes
• Minimum instruction execution time: 0.24
µ
s (@ f
X
= 8.38-MHz operation)
• I/O ports: 51 (5-V-tolerant N-ch open-drain: 4)
• 10-bit resolution A/D converter: 8 channels (AV
DD
= 1.8 to 5.5 V)
• Serial interface: 3 channels (multimaster-supporting I
2
C bus mode, UART mode, 3-wire serial I/O mode)
• Timer: 5 channels
• Power supply voltage: V
DD
= 1.8 to 5.5 V
APPLICATIONS
Telephones, home electric appliances, pagers, AV equipment, car audios, office automation equipment, etc.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U14045EJ1V0DS00 (1st edition)
Date Published August 1999 N CP(K)
Printed in Japan
©
1999
µ
PD780031AY, 780032AY, 780033AY, 780034AY
ORDERING INFORMATION
Part Number
Package
64-pin plastic shrink DIP (750 mils)
64-pin plastic QFP (14
×
14 mm)
64-pin plastic LQFP (12
×
12 mm)
64-pin plastic shrink DIP (750 mils)
64-pin plastic QFP (14
×
14 mm)
64-pin plastic LQFP (12
×
12 mm)
64-pin plastic shrink DIP (750 mils)
64-pin plastic QFP (14
×
14 mm)
64-pin plastic LQFP (12
×
12 mm)
64-pin plastic shrink DIP (750 mils)
64-pin plastic QFP (14
×
14 mm)
64-pin plastic LQFP (12
×
12 mm)
µ
PD780031AYCW-×××
µ
PD780031AYGC-×××-AB8
µ
PD780031AYGK-×××-8A8
µ
PD780032AYCW-×××
µ
PD780032AYGC-×××-AB8
µ
PD780032AYGK-×××-8A8
µ
PD780033AYCW-×××
µ
PD780033AYGC-×××-AB8
µ
PD780033AYGK-×××-8A8
µ
PD780034AYCW-×××
µ
PD780034AYGC-×××-AB8
µ
PD780034AYGK-×××-8A8
Remark
×××
indicates ROM code suffix.
2
Data Sheet U14045EJ1V0DS00
µ
PD780031AY, 780032AY, 780033AY, 780034AY
78K/0 SERIES LINEUP
The products in the 78K/0 Series are listed below. The names enclosed in boxes are subseries names.
Products in mass production
Products under development
Y subseries products are compatible with I
2
C bus.
Control
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780065
µ
PD780078
µ
PD780034A
µ
PD780024A
µ
PD78014H
µ
PD78018F
µ
PD78083
Inverter control
EMI-noise reduced version of the
µ
PD78078
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
µ
PD780058Y
µ
PD78058FY
µ
PD78054Y
µ
PD780078Y
µ
PD780034AY
µ
PD780024AY
µ
PD78018FY
µ
PD78054 with added timer and enhanced external interface
ROM-less version of the
µ
PD78078
µ
PD78078Y with enhanced serial I/O and limited functions
µ
PD78054 with enhanced serial I/O
EMI-noise reduced version of the
µ
PD78054
µ
PD78018F with added UART and D/A converter and enhanced I/O
µ
PD780024A with increased RAM capacity
A
µ
PD780034A with added timer and enhanced serial I/O
µ
PD780024A with enhanced A/D converter
µ
PD78018F with enhanced serial I/O
EMI-noise reduced version of the
µ
PD78018F
Basic subseries for control
On-chip UART, capable of operating at low voltage (1.8 V)
64-pin
µ
PD780988
FIP
TM
drive
On-chip inverter control circuit and UART. EMI-noise reduced.
100-pin
78K/0
Series
100-pin
80-pin
80-pin
80-pin
µ
PD780208
µ
PD780228
µ
PD780232
µ
PD78044H
µ
PD78044F
LCD drive
µ
PD78044F with enhanced I/O and FIP C/D. Display output total: 53
µ
PD78044H with enhanced I/O and FIP C/D. Display output total: 48
For panel control. On-chip FIP C/D. Display output total: 53
µ
PD78044F with added N-ch open drain I/O. Display output total: 34
Basic subseries for driving FIP. Display output total: 34
100-pin
100-pin
100-pin
µ
PD780308
µ
PD78064B
µ
PD78064
µ
PD780308Y
µ
PD78064Y
µ
PD78064 with enhanced SIO, and increased ROM, RAM capacity.
EMI-noise reduced version of the
µ
PD78064
Basic subseries for driving LCDs, on-chip UART
Call ID supported
80-pin
µ
PD780841
Bus interface supported
On-chip Call ID and simple DTMF. EMI-noise reduced.
100-pin
80-pin
80-pin
80-pin
µ
PD780948
µ
PD78098B
µ
PD780701Y
µ
PD780833Y
Meter control
On-chip D-CAN controller
µ
PD78054 with IEBus
TM
controller added. EMI-noise reduced.
On-chip D-CAN/IEBus controller
On-chip controller compliant with J1850 (Class 2)
100-pin
80-pin
80-pin
80-pin
µ
PD780958
µ
PD780955
µ
PD780973
µ
PD780824
For industrial meter control
Ultra low-power consumption. On-chip UART.
On-chip automobile meter controller/driver
For automobile meter. On-chip D-CAN controller.
Data Sheet U14045EJ1V0DS00
3
µ
PD780031AY, 780032AY, 780033AY, 780034AY
The major functional differences among the Y subseries are shown below.
Function ROM Capacity
Subseries Name
Control
Configuration of Serial Interface
3-wire/2-wire/I
2
C:
I/O V
DD
MIN.
Value
48 K to 60 K
—
48 K to 60 K
1 ch
88
61
88
1.8 V
2.7 V
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
3-wire with automatic transmit/receive function: 1 ch
3-wire/UART:
1 ch
3-wire with automatic transmit/receive function: 1 ch
Time-division 3-wire:
1 ch
2
C bus (multimaster supported):
I
1 ch
3-wire/2-wire/I
2
C:
1 ch
3-wire with automatic transmit/receive function: 1 ch
3-wire/time-division UART:
1 ch
3-wire/2-wire/I
2
C:
1 ch
3-wire with automatic transmit/receive function: 1 ch
3-wire/UART:
1 ch
3-wire:
UART:
3-wire/UART:
I
2
C bus (multimaster supported):
UART:
3-wire:
I
2
C bus (multimaster supported):
1
1
1
1
ch
ch
ch
ch
µ
PD780058Y
24 K to 60 K
68
1.8 V
µ
PD78058FY
µ
PD78054Y
µ
PD780078Y
48 K to 60 K
16 K to 60 K
48 K to 60 K
69
2.7 V
2.0 V
52
1.8 V
µ
PD780034AY
µ
PD780024AY
µ
PD78018FY
LCD
drive
8 K to 32 K
1 ch
1 ch
1 ch
51
1.8 V
8 K to 60 K
3-wire/2-wire/I
2
C:
1 ch
3-wire with automatic transmit/receive function: 1 ch
3-wire/2-wire/I
2
C:
3-wire/time-division UART:
3-wire:
3-wire/2-wire/I
2
C:
3-wire/UART:
1 ch
1 ch
1 ch
1 ch
1 ch
53
µ
PD780308Y
48 K to 60 K
57
2.0 V
µ
PD78064Y
16 K to 32 K
Remark
Functions other than the serial interface are common to the non-Y subseries.
4
Data Sheet U14045EJ1V0DS00
µ
PD780031AY, 780032AY, 780033AY, 780034AY
OVERVIEW OF FUNCTIONS
Part Number
Item
Internal
memory
Memory space
General-purpose registers
Minimum instruction execution
time
ROM
High-speed RAM
8 Kbytes
512 bytes
64 Kbytes
8 bits
×
32 registers (8 bits
×
8 registers
×
4 banks)
On-chip minimum instruction execution time cycle variable function
16 Kbytes
24 Kbytes
1024 bytes
32 Kbytes
µ
PD780031AY
µ
PD780032AY
µ
PD780033AY
µ
PD780034AY
When main system 0.24
µ
s/0.48
µ
s/0.95
µ
s/1.91
µ
s/3.81
µ
s (@ 8.38-MHz operation)
clock selected
When subsystem
clock selected
122
µ
s (@ 32.768-kHz operation)
•
•
•
•
16-bit operation
Multiply/divide (8 bits
×
8 bits,16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjust, etc.
51
8
Instruction set
I/O ports
Total:
• CMOS input:
• CMOS I/O:
39
• 5-V-tolerant N-ch open-drain I/O: 4
A/D converter
• 10-bit resolution x 8 channels
• Low-voltage operation available: AV
DD
= 1.8 to 5.5 V
Serial interface
• 3-wire serial I/O mode:
• UART mode:
• I
2
C bus mode (multimaster supported):
• 16-bit timer/event counter:
• 8-bit timer/event counter:
• Watch timer:
• Watchdog timer:
Timer output
Clock output
3 (8-bit PWM output capable: 2)
• 65.5 kHz, 131 kHz, 262 kHz, 524 kHz, 1.05 MHz, 2.10 MHz, 4.19 MHz, 8.38 MHz
(@ 8.38-MHz operation with main system clock )
• 32.768 kHz (@ 32.768-kHz operation with subsystem clock)
Buzzer output
Vectored
interrupt
sources
Maskable
Non-maskable
Software
1.02 kHz, 2.05 kHz, 4.10 kHz, 8.19 kHz (@ 8.38-MHz operation with main system clock)
Internal: 13, external: 5
Internal: 1
1
V
DD
= 1.8 to 5.5 V
T
A
= –40 to +85°C
• 64-pin plastic shrink DIP (750 mils)
• 64-pin plastic QFP (14
×
14 mm)
• 64-pin plastic LQFP (12
×
12 mm)
1 channel
1 channel
1 channel
Timer
1 channel
2 channels
1 channel
1 channel
Power supply voltage
Operating ambient temperature
Package
Data Sheet U14045EJ1V0DS00
5
stm32/stm8
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
