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UPD72874GC-YEB: 产品描述IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER; 文件大小248KB，共40页; 制造商NEC ( Renesas ); 官网地址https://www2.renesas.cn/zh-cn/

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UPD72874GC-YEB概述

IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER

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PRELIMINARY DATA SHEET

MOS INTEGRATED CIRCUIT

PD72874

IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER

The

PD72874 is the LSI that integrated OHCI-Link and PHY function into a single chip. The

PD72874 complies

with the 1394 OHCI Specification 1.1 and the IEEE Std 1394a-2000 specifications, and works up to 400 Mbps.

It makes design so compact for PC and PC card application.

FEATURES

• Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.1

• Compliant with Physical Layer Services as defined in IEEE Std 1394a-2000

• Provides three cable ports at 100/200/400 Mbps

• Super Low power consumption for Physical Layer

• Compliant with protocol enhancement as defined in IEEE Std1394a-2000

• Modular 32-bit host interface compliant to PCI Specification release 2.2

• Supports PCI-Bus Power Management Interface Specification release 1.1

• Modular 32-bit host interface compliant to Card Bus Specification

• Cycle Master and Isochronous Resource Manager capable

•

Built-in FIFOs for isochronous transmit (2048 bytes), asynchronous transmit (2048 bytes), and receive (3072

bytes)

• Supports D0, D1, D2, D3hot

• Supports wake up function from D3cold

• 32-bit CRC generation and checking for receive/transmit packets

• 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported

• 32-bit DMA channels for physical memory read/write

• Clock generation by 24.576 MHz X’tal

• 2-wire Serial EEPROM

interface supported

• Separate power supply Link and PHY

• Programmable latency timer from serial EEPROM in Cardbus mode (CARD_ON = 1)

ORDERING INFORMATION

Part number

Package

120-pin plastic TQFP (Fine pitch) (14 x 14)

PD72874GC-YEB

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. S15306EJ2V0DS00 (2nd edition)

Date Published April 2002 NS CP (K)

Printed in Japan

The mark

shows major revised points.

2001

UPD72874GC-YEB相似产品对比

	UPD72874GC-YEB	UPD72874	UPD7281
描述	IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER	IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER	IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER

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