Technical Information
ICE-H8
In-Circuit Emulator for Renesas H8/300 and H8/500
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Support for 300, 300H and 500 family
Support for 5V and 3.3V
Full bondout support
Up to 20MHz support
On chip ROM and FLASH emulation
Banking up to 16MByte (256 banks)
Dual ported memory
Software compatible ROM Monitor
Interface with all compilers
RTOS support
CASE tool interface
Windows9x, NT and X windows interface
ICE-H8
H8/3001
H8/3002
H8/3003
H8/3004
H8/3005
H8/3006
H8/3007
H8/3030
H8/3031
H8/3032
H8/3040
H8/3041
H8/3042
H8/3044
H8/3045
H8/3047
H8/3048
H8/3048F
H8/3060
H8/3061
H8/3062
H8/3064
H8/3065
H8/3066
H8/3067
H8/3101
H8/3102
H8/3202
H8/3212
H8/3214
H8/3216
H8/3217
H8/322
H8/323
H8/324
H8/325
H8/3256
H8/3257
H8/326
H8/327
H8/328
H8/329
H8/3292
H8/3294
H8/3296
H8/3297
H8/330
H8/3334Y
H8/3334YF
H8/3336Y
H8/3337Y
H8/336
H8/337
H8/338
H8/3394
H8/3396
H8/3397
H8/3434
H8/3434F
H8/3436
H8/3437
H8/350
H8/3640
H8/3641
H8/3642
H8/3643
H8/3644
H8/3812
H8/3813
H8/3833
H8/3834
H8/3835
H8/3836
H8/3837
H8/520
H8/532
H8/534R
H8/534S
H8/536R
H8/536S
H8/537
TRACE32-ICEH8 supports most members of the H8 fam-
ily from Renesas. The modular and open technology of
the system allows the fast integration of new chip designs.
TRACE32-ICE is a state of the art In-Circuit Emulator,
which offers unlimited hardware breakpoints and up to
16MByte dual-ported emulation memory. The real-time
trace and trigger work up to the max. speed of the CPU.
The analyzer offers selective trace
as well as performance analysis and statistic functions.
The system offers an interface to all C and C++ compilers.
Full RTOS support is available for HIOS/Renesas and
Nucleus PLUS from Accelerated Technology.
TRACE32 works with the highest variety of host inter-
faces. The communication link to the host is done by the
printer port, a fibre optic interface or ethernet allowing a
high speed transfer.
27.03.07
TRACE32 - Technical Information
2
ICE-H8
TRACE32 - Technical Information
3
Features
Basics of Operation
Emulation
Bus
Break
Control
Emulation-
CPU
Strobe/
Buffer
Control
Voltage
Control
Exception
Control
Target
Dualport
Control
Wait
Control
Port
Buffer
Emulation module
The ICE H8 probe is a high-perfor-
mance emulation system for many
derivatives of the H8 family. The
change between different CPU types is
done by changing the emulation mod-
ule.
Port
Analyzer
Base module
On the emulation base there is an extra
slot for the TRACE32 Port Analyzer
which can trace up to 64 port lines.
Operating Modes
The Emulator can work in stand-alone
mode with internal clock or in active
mode with internal or the target clock.
On power-down of the target system
the emulator tristates its output buffers
and isolates its internal emulation cir-
cuits.
The opeartion modes are as follows:
t
Reset Down
t
Reset Up
t
No Probe
t
Alone Internal
t
Alone External
t
Emulation Internal
t
Emulation External
Clock
t
Operation with external or
internal clock
ICE-H8
Features
TRACE32 - Technical Information
t
Max. operation frequency:
20 MHz
4
Clock Fail Detection
Support for all Operation Modes
Operation modes
ICE-H8 supports the realtime emula-
tion of all operations modes at max.
speed.
ICE-H8
Features
TRACE32 - Technical Information
5
Dual-port Access
Dual port access modes
All TRACE32 memories are dual-
ported. The dual-port access makes it
possible to display and modify the con-
tents of the overlay memory, to set or
delete breakpoints or use the flag
memory while the application is run-
ning in real-time.
The H8 has four dual-port modes:
In
Wait
mode, wait states are inserted
for the dual-port access via the wait
pin. This is only possible, if the corre-
sponding pins is configured as the wait
pin.
In
ClkSteal
mode, the CPU clock is
stopped for some cycles during the
dual-port access. This works only if the
emulator uses the internal VCO clock.
In
Idle
mode, the emulator waits on idle
cycles of the CPU to perform the dual-
port access. This cycles are generated
for example during subroutine jumps.
In the
Denied Mode
the dual-port
access is switched off.
t
Nodelay
t
Wait
t
ClkSteal
t
Idle
In
Nodelay
mode, the dual-port access
is inserted in the regular bus cycles,
generated by the CPU. This means
that the CPU runs in real time during
the dual-port access.
ICE-H8
Features
FPGA/CPLD
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