SSM3J327R
TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ)
SSM3J327R
○
Power Management Switch Applications
•
•
1.5-V drive
Low ON-resistance: R
DS(ON)
= 240 mΩ (max) (@V
GS
= -1.5 V)
R
DS(ON)
= 168 mΩ (max) (@V
GS
= -1.8 V)
R
DS(ON)
= 123 mΩ (max) (@V
GS
= -2.5 V)
R
DS(ON)
= 93 mΩ (max) (@V
GS
= -4.5 V)
0.05 M A
0.42
-0.05
3
+0.08
Unit: mm
0.17
-0.07
+0.08
1.8±0.1
1
2
Absolute Maximum Ratings
(Ta = 25°C)
Characteristic
Drain-source voltage
Gate-source voltage
Drain current
Power dissipation
Channel temperature
Storage temperature range
DC
Pulse
Symbol
V
DSS
V
GSS
I
D
(Note 1)
I
DP
(Note 1)
P
D
(Note 2)
t = 10s
T
ch
T
stg
Rating
-20
±
8
-3.9
-7.8
1
2
150
−55
to 150
Unit
V
V
A
W
°C
°C
0.95
0.95
2.9±0.2
2.4±0.1
A
1: Gate
2: Source
3: Drain
SOT-23F
JEDEC
―
Note: Using continuously under heavy loads (e.g. the application of high
JEITA
―
temperature/current/voltage and the significant change in
TOSHIBA
2-3Z1A
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
Weight: 11 mg (typ.)
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: Mounted on a FR4 board.
2
(25.4 mm
×
25.4 mm
×
1.6 mm, Cu Pad: 645 mm )
Marking (Top View)
3
Equivalent Circuit
3
KFG
1
2
1
2
Start of commercial production
2009-12
1
2014-03-01
0.8
+0.08
-0.05
SSM3J327R
Electrical Characteristics
(Ta = 25°C)
Characteristic
Drain-source breakdown voltage
Drain cut-off current
Gate leakage current
Gate threshold voltage
Forward transfer admittance
Symbol
Test Conditions
Min
-20
(Note 4)
-15
⎯
⎯
-0.3
(Note 3)
(Note 3)
(Note 3)
(Note 3)
(Note 3)
2.8
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
(Note 3)
⎯
Typ.
⎯
⎯
⎯
⎯
⎯
5.6
78.5
97.5
120
141
290
44
32
12.0
46.2
4.6
3.4
1.2
0.97
Max
⎯
⎯
-1
±1
-1.0
⎯
93
123
168
240
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
1.2
V
nC
ns
pF
mΩ
Unit
V
V
μA
μA
V
S
V
(BR) DSS
I
D
= -1 mA, V
GS
= 0 V
V
(BR) DSX
I
D
= -1 mA, V
GS
= 5 V
I
DSS
I
GSS
V
th
⏐Y
fs
⏐
V
DS
= -20 V, V
GS
= 0 V
V
GS
=
±8
V, V
DS
= 0 V
V
DS
= -3 V, I
D
= -1 mA
V
DS
= -3 V, I
D
= -1.0 A
I
D
= -1.5 A, V
GS
= -4.5 V
Drain–source ON-resistance
R
DS (ON)
I
D
= -1.0 A, V
GS
= -2.5 V
I
D
= -0.5 A, V
GS
= -1.8 V
I
D
= -0.25 A, V
GS
= -1.5 V
Input capacitance
Output capacitance
Reverse transfer capacitance
Switching time
Total gate charge
Gate-source charge
Gate-drain charge
Drain-source forward voltage
Turn-on time
Turn-off time
C
iss
C
oss
C
rss
t
on
t
off
Q
g
Q
gs
Q
gd
V
DSF
V
DS
= -10 V, V
GS
= 0 V
f = 1 MHz
V
DD
= -10 V, I
D
= -0.5 A
V
GS
= 0 to -2.5 V, R
G
= 4.7
Ω
V
DD
= -10 V, I
DS
= -3.9 A,
V
GS
= -4.5 V
I
D
= 3.9 A, V
GS
= 0 V
Note3: Pulse test
Note4: If a forward bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the
drain-source breakdown voltage is lowered in this mode.
Switching Time Test Circuit
(a) Test Circuit
(b) V
IN
0
OUT
IN
−2.5
V
R
G
R
L
V
DD
V
DD
t
on
10%
0V
90%
−
2.5V
10
μs
(c) V
OUT
V
DS (ON)
90%
10%
t
r
t
off
t
f
V
DD
= -10 V
R
G
= 4.7
Ω
Duty
≤
1%
V
IN
: t
r
, t
f
< 5 ns
Common Source
Ta = 25°C
Notice on Usage
Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to be low (-1 mA for the
SSM3J327R). Then, for normal switching operation, V
GS(on)
must be higher than V
th,
and V
GS(off)
must be lower than
V
th.
This relationship can be expressed as: V
GS(off)
< V
th
< V
GS(on)
.
Take this into consideration when using the device.
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is
protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that
come into direct contact with devices should be made of antistatic materials.
Thermal resistance R
th (ch-a)
and drain power dissipation P
D
vary depending on board material, board area, board
thickness and pad area. When using this device, please take heat dissipation into consideration.
2
2014-03-01
SSM3J327R
I
D
– V
DS
-8
-4.5V
-2.5V
-1.8 V
-6
-1
-10
Common Source
VDS = -3 V
Pulse test
I
D
– V
GS
(A)
I
D
I
D
-4
VGS = -1.5 V
(A)
Drain current
Drain current
-0.1
Ta = 100 °C
-0.01
25 °C
-0.001
- 25 °C
-2
Common Source
Ta = 25 °C
0
Pulse test
0
-0.2
-0.4
-0.6
-0.8
-1
-0.0001
0
-1.0
-2.0
Drain–source voltage
V
DS
(V)
Gate–source voltage
V
GS
(V)
R
DS (ON)
– V
GS
300
ID =-1.5A
Common Source
Pulse test
300
Common Source
Ta = 25°C
Pulse test
R
DS (ON)
– I
D
Drain–source ON-resistance
R
DS (ON)
(mΩ)
Drain–source ON-resistance
R
DS (ON)
(mΩ)
-1.5 V
-1.8V
200
200
25 °C
Ta = 100 °C
-2.5 V
100
VGS = -4.5 V
100
- 25 °C
0
0
-2
-4
-6
-8
0
0
-2.0
-4.0
-6.0
-8.0
Gate–source voltage
V
GS
(V)
Drain current
I
D
(A)
300
R
DS (ON)
– Ta
Common Source
Pulse test
V
th
– Ta
-1.0
Drain–source ON-resistance
R
DS (ON)
(mΩ)
-1.0 A / -2.5 V
200
-0.5 A / -1.8V
Gate threshold voltage
V
th
(V)
Common Source
VDS = -3 V
ID = -1 mA
-0.5
-0.25 A / -1.5 V
100
ID = -1.5 A / VGS = -4.5 V
0
−50
0
50
100
150
0
−50
0
50
100
150
Ambient temperature
Ta
(°C)
Ambient temperature
Ta
(°C)
3
2014-03-01
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