Multi-Core MIPS64 Processors
R
OCTEON Plus CN54XX 4 to 6-Core MIPS64-Based SoCs
Product Brief
The OCTEON® Plus CN54XX family of Multi-core MIPS64 processors targets intelligent networking, control plane, security, and
wireless applications in next-generation equipment from 500Mbps to full-duples 4Gbps performance. The family includes nine di erent
software-compatible parts, with four to six cnMIPS64 cores on a single chip that integrate next-generation SERDES based
networking I/Os along with the most advanced security and application hardware acceleration to deliver a robust performance,
power and real-estate value proposition over alternative solutions. Industry’s rst Network Services Processor with less than 3 Watt/GHz
power consumption across the 3 GHz to 6 GHz range.
®
OVERVIEW
FEATURES
Software compatible with the leading OCTEON family
•
4 - 6 cnMIPS CPU cores (MIPS64/32 compatible)
•
Available in 500 MHz to 700 MHz versions
•
Enhanced MIPS64 integer (Release 2) instruction set
•
Dual-issue, ve-stage pipeline, optimized latencies
•
Auto instruction pre-fetching and advanced data
pre-fetching features to minimize memory stalls
High-performance coherent memory subsystem
•
1MB ECC protected L2 cache with locking,
partitioning features for optimal performance
•
Integrated mainstream Dual DDR2 memory controller
with ECC, up to DDR2-800, up to 72-bit wide
Integrated coprocessors for application acceleration
•
Packet I/O processing, QoS, TCP acceleration
•
Support for IPsec, SSL, SRTP, WLAN and 3G/UMB/LTE
security (includes DES, 3DES, AES-GCM, AES up to 256,
SHA1, SHA-2 up to SHA-512, RSA up to 8192, DH, KASUMI)
•
Compression/Decompression
High-density, high-bandwidth serial I/O for networking
•
16 high-speed SERDES allowing exiible combination of
PCI Express, XAUI (10GE), SGMII (GbE/2GbE)
Comprehensive development environment with Linux,
VxWorks, FreeBSD, NetBSD, and C/C++ support
Optimized power consumption: 8W – 20W
•
Package: 35 x35 mm 1217 FCBGA
BENEFITS
Market-leading performance
•
Up to 8.4 Billion instructions per second
•
Over 4+ Gbps application performance
- Up to 8 Mpps 64B IP forwarding
- Up to 10+ Gbps for TCP, IPsec, SSL, KASUMI
- Up to 8Gbps for Compression/Decompression
Double L1/L2 caches and up to 3x Interconnect bandwidth
along with over OCTEON CN3XXX family
Sophisticated hardware based QoS support
•
Queuing, scheduling
•
Very low latency for real-time tra c
Scalable per-core security coprocessor architecture for lower
latency, reduced interconnect overhead, and higher small
packet performance
Reduced BOM cost with essential interfaces
Standalone Routers/Appliances, O oad Module, ATCA,
AMC, MicroTCA and NIC Applications
Flexible architecture allows host and coprocessor
Implementations in a single chip
Industry-standard programming model without any need for
proprietary tools or micro-coding
Fully software compatible with entire OCTEON family
to deliver 1- 16 CPU scalability
Highest performance, optimized power and integration
for Networking and Wireless control plane, L4-L7 data
and security services
OCTEON
®
Plus CN54XX
- Block Diagram
Boot/flash
GPIO, MISC,
USB2.0, FE
Other I/O
4x SGMII
or 4x 1000B-X
or XAUI
PCIe
Core
PCIe
Core
PCIe Engines
Scheduler/
Sync. Order
Packet
Security
Packet
4x
x16 Serdes
enables
combination of
PCIe (2 controllers),
XAUI, SGMII or
1000B-X interfaces
with
PCIe switching*
TCP Unit
MIPS64 r2
Integer Core
32K Icache
Switch
4x
4x
4 to 6
cnMIPS64
cores
Security
MIPS64 r2
Integer Core
32K Icache
16K Dcache
2K Write Buffer
Packet
Input
I/O Bridge
16K Dcache
2K Write Buffer
4x
Compression/
Decompression
Coherent Low Latency
Interconnect
1 MB
L2 Cache
Hyper Access
Memory Controller
Packet
Output
DMA Engines
I/O Bus
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
*Interface Options
•
8 - lanes PCIe + 4 - lanes PCIe + [4x SGMII or XAUI]
•
8 - lanes PCIe + 8 - lanes PCIe
DDR2 up to 800 MHz
1x or 2x 72-bit wide
(with ECC)
Multi-Core MIPS64 Processors
R
OCTEON Plus CN54XX 4 to 6-Core MIPS64-Based SoCs
Product Brief
OCTEON Plus CN54XX - Based System Block Diagram
OCTEON Plus Single Chip Router/Appliance
PCIe x4 or x8
System
DRAM
72 or 144-bit
Antenna/RF
DSP
DSP
®
®
WiMAX Base Station/VoIP Line Card Design
Memory
Memory
3x SGMII
WAN/LAN
OCTEON
CN52XX
2.5 GE
LAN/Fabric
Antenna/RF
DSP
WiMAX PHYs
SGMII
OCTEON
CN52XX
SGMII/2.5 GE
GE
Backplane
USB 2.0
Control, Data, MAC layer processing
APPLICATIONS
•
Next-generation integrated, standalone routers and
appliances
•
Uni ed Threat Management (UTM) appliances with
Firewall, VPN (IPsec, SSL), IDS, IPS and Anti-virus
scanning
•
Wireless WAN security, control and packet processing
including 3G/ UMB, LTE, and WiMAX
•
Network and Server acceleration cards for security, TCP,
content processing, and compression
•
Integrated management and router processor cards
•
Switch/router line card and services card control
and datapath processing
•
Wireless LAN switch/appliance security and packet
processing
•
Application aware/L4+ content processing and switching
SOFTWARE SUPPORT
•
Cavium SDK includes:
-
Up to 6-way SMP LINUX support
-
Cavium Simple Executive for data plane applications
-
Complete GNU tool-chain, GDB, DDD and Viewzilla
for tuning
-
Optimized C libraries for security, regular expression,
de/compression processing o oad
-
Support for run-to-completion or pipelined software
models
•
Complete production quality development toolkits for IP,
IPsec, SSL, TCP, SSL-VPN, SRTP available
•
Comprehensive ecosystem support
-
Popular third-party operating systems and toolchains,
including MontaVista Linux, Wind River VxWorks, and
Linux, ENEA OSE, and NetBSD
-
Broad range of third-party application software vendors
-
Broad choices of ODM appliances, AMC, and ATCA cards
•
MIPS64/32 support enables thousands of MIPS and other
C/C++ applications to be easily ported to OCTEON
OCTEON Plus CN54XX - Product Family
Performance
Device
cnMIPS
cores
Max. Available
Instructions
Per Second
5.6B
8.4B
Option
N
S
P
Y
Y
C
P
L2 Cache
Packet
Interfaces
PCI-Express
Controllers
Main Memory IO
w/ECC
Package
®
CN5430
CN5434
4
6
Y
Y
1MB
4x SGMII or
1x XAUI
2x [x4 or x 8 Lanes]
DDR2 up to 800 MHz
1x or 2x 72-bits wide
1217 FCBGA
2315 N. First Street
San Jose, CA 95131
T
408-943-7100
F
408-577-1992
E
sales@cavium.com
www.cavium.com
Device Options:
Device Sp eed Grade (500LP = 500 Low Power, 600LP = 600 MHz Low Power, 600 = 600 MHz, 700 = 700 MHz)
Option code for device family listed below:
NSP = Network Services Processor: Includes, encryption, de/compression, networking, TCP acceleration and QoS
CP = Communications Processor: Includes networking, TCP acceleration and QoS
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All other brands and product names are registered trademarks of their respective owners.
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