PIC24FV16KM204 FAMILY
General Purpose, 16-Bit Flash Microcontroller
with XLP Technology Data Sheet
Analog Peripheral Features
• Up to Two 8-Bit Digital-to-Analog Converters
(DAC):
- Soft Reset disable function allows DAC to
retain its output value through non-V
DD
Resets
- Support for Idle mode
- Support for left and right-justified input data
• Two Operational Amplifiers (Op Amps):
- Differential inputs
- Selectable power/speed levels:
- Low power/low speed
- High power/high speed
• Up to 22-Channel, 10/12-Bit Analog-to-Digital
Converter:
- 100k samples/second at 12-bit conversion
rate (single Sample-and-Hold)
- Auto-scan with Threshold Detect
- Can operate during Sleep
- Dedicated band gap reference and
temperature sensor input
• Up to Three Rail-to-Rail Analog Comparators:
- Programmable reference voltage for
comparators
- Band gap reference input
- Flexible input multiplexing
- Low-power or high-speed selection options
• Charge Time Measurement Unit (CTMU):
- Capacitive measurement, up to 22 channels
- Time measurement down to 200 ps
resolution
- Up to 16 external Trigger pairs
• Internal Temperature Sensor with Dedicated A/D
Converter Input
Multiple/Single Capture Compare
Peripheral (MCCP/SCCP) Features
• 16 or 32-Bit Time Base
• 16 or 32-Bit Capture
- 4-Deep Capture Buffer
• 16 or 32-Bit Compare:
- Single Edge Compare modes
- Dual Edge Compare/PWM modes
- Center-Aligned Compare mode
- Variable Frequency Pulse mode
• Fully Asynchronous Operation, Available in
Sleep modes
• Single Output Steerable mode (MCCP only)
• Brush DC Forward and Reverse modes
(MCCP only)
• Half-Bridge with Dead-Time Delay (MCCP only)
• Push-Pull PWM mode (MCCP only)
• Auto-Shutdown with Programmable Source and
Shutdown State
• Programmable Output Polarity
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 1
PIC24FV16KM204 FAMILY
Special Microcontroller Features
• Wide Operating Voltage Range Options:
- 1.8V to 3.6V (PIC24F devices)
- 2.0V to 5.0V (PIC24FV devices)
• Selectable Power Management modes:
- Idle: CPU shuts down, allowing for significant
power reduction
- Sleep: CPU and peripherals shut down for
substantial power reduction and fast wake-up
- Retention Sleep mode: PIC24FV devices can
enter Sleep mode, employing the
retention regulator, further reducing power
consumption
- Doze: CPU can run at a lower frequency than
peripherals, a user-programmable feature
- Alternate Clock modes allow on-the-fly
switching to a lower clock speed for selective
power reduction
• Fail-Safe Clock Monitor:
- Detects clock failure and switches to on-chip,
low-power RC oscillator
• Ultra Low-Power Wake-up Pin Provides an
External Trigger for Wake from Sleep
• 10,000 Erase/Write Cycle Endurance Flash
Program Memory, Typical
• 100,000 Erase/Write Cycle Endurance
Data EEPROM, Typical
• Flash and Data EEPROM Data Retention: 20 Years
Minimum
• Self-Programmable under Software Control
• Power-on Reset (POR), Power-up Timer (PWRT)
and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its Own On-Chip
RC Oscillator for Reliable Operation
• On-Chip Regulator for 5V Operation
• Selectable Windowed WDT Feature
• Selectable Oscillator Options including:
- 4x Phase Locked Loop (PLL)
• 8 MHz (FRC) Internal RC Oscillator:
- HS/EC, high-speed crystal/resonator
oscillator or external clock
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Emulation (ICE) – via Two Pins
• In-Circuit Debugging
• Programmable High/Low-Voltage
Detect (HLVD) module
• Programmable Brown-out Reset (BOR):
- Software enable feature
- Configurable shutdown in Sleep
- Auto-configures power mode and sensitivity
based on device operating speed
- LPBOR available for re-arming of the POR
High-Performance RISC CPU
• Modified Harvard Architecture
• Operating Speed:
- DC – 32 MHz clock input
- 16 MIPS at 32 MHz clock input
• 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple clock divide options
- Fast start-up
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/Integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
• 24-Bit-Wide Instructions
• 16-Bit-Wide Data Path
• Linear Program Memory Addressing, up to
6 Mbytes
• Linear Data Memory Addressing, up to 64 Kbytes
• Two Address Generation Units (AGUs) for Separate
Read and Write Addressing of Data Memory
Peripheral Features
• High-Current Sink/Source, 18 mA/18 mA All Ports
• Independent Ultra Low-Power, 32 kHz
Timer Oscillator
• Up to Two Master Synchronous Serial Ports
(MSSPs) with SPI and I
2
C™ modes:
In SPI mode:
- User-configurable SCKx and SDOx pin outputs
- Daisy-chaining of SPI slave devices
In I
2
C mode:
- Serial clock synchronization (clock stretching)
- Bus collision detection and will arbitrate
accordingly
- Support for 16-bit read/write interface
• Up to Two Enhanced Addressable UARTs:
- LIN/J2602 bus support (auto-wake-up,
Auto-Baud Detect, Break character support)
- High and low speed (SCI)
- IrDA
®
mode (hardware encoder/decoder
function)
• Two External Interrupt Pins
• Hardware Real-Time Clock and Calendar (RTCC)
• Configurable Reference Clock Output (REFO)
• Two Configurable Logic Cells (CLC)
• Up to Two Single Output Capture/Compare/PWM
(SCCP) modules and up to Three Multiple Output
Capture/Compare/PWM (MCCP) modules
2013 Microchip Technology Inc.
Advance Information
DS33030A-page 3
PIC24FV16KM204 FAMILY
Pin Diagrams
20-Pin SPDIP/SSOP/SOIC
RA5
RA0
RA1
RB0
RB1
RB2
RA2
RA3
RB4
RA4
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DD
V
SS
RB15
RB14
RB13
RB12
RA6
OR
V
DDCORE
RB9
RB8
RB7
PIC24F08KM101
Pin Features
Pin
PIC24F08KM101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MCLR/V
PP
/RA5
PGC2/CV
REF
+/V
REF
+/AN0/CN2/RA0
PGD2/CV
REF
-/V
REF
-/AN1/CN3/RA1
PGD1/AN2/CTCMP/ULPWU/C1IND/OC2A/CN4/RB0
PGC1/AN3/C1INC/CTED12/CN5/RB1
AN4/U1RX/TCKIB/CTED13/CN6/RB2
OSCI/CLKI/AN13/C1INB/CN30/RA2
OSCO/CLKO/AN14/C1INA/CN29/RA3
PGD3/SOSCI/AN15/CLCINA/CN1/RB4
PGC3/SOSCO/SCLKI/AN16/PWRLCLK/CLCINB/CN0/RA4
AN19/U1TX/CTED1/INT0/CN23/RB7
AN20/SCL1/U1CTS/OC1B/CTED10/CN22/RB8
AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/CLC1O/CTED4/CN21/RB9
IC1/OC1A/INT2/CN8/RA6
AN12/HLVDIN/SCK1/OC1C/CTED2/CN14/RB12
AN11/SDO1/OCFB/OC1D/CTPLS/CN13/RB13
CV
REF
/AN10/SDI1/C1OUT/OCFA/CTED5/INT1/CN12/RB14
AN9/REFO/SS1/TCKIA/CTED6/CN11/RB15
V
SS
/AV
SS
V
DD
/AV
DD
V
CAP OR
V
DDCORE
AN12/HLVDIN/SCK1/OC1C/CTED2/INT2/CN14/RB12
AN19/U1TX/IC1/OC1A/CTED1/INT0/CN23/RB7
PIC24FVKM08KM101
DS33030A-page 4
Advance Information
2013 Microchip Technology Inc.
PIC24FV16KM204 FAMILY
Pin Diagrams (Continued)
CV
REF
+
RA1
RA0
RA5
20-Pin QFN
RB0 1
RB1 2
20
19 18 17
16
15
RB15
14 RB14
RB2 3
PIC24F08KM101
13 RB13
RA2 4
RA3 5
6
RB4
7
RA4
8
RB7
9
RB8
10
RB9
12 RB12
11
RA6 or V
DDCORE
Pin Features
Pin
PIC24F08KM101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PGD1/AN2/CTCMP/ULPWU/C1IND/OC2A/CN4/RB0
PGC1/AN3/C1INC/CTED12/CN5/RB1
AN4/U1RX/TCKIB/CTED13/CN6/RB2
OSCI/CLKI/AN13/C1INB/CN30/RA2
OSCO/CLKO/AN14/C1INA/CN29/RA3
PGD3/SOSCI/AN15/CLCINA/CN1/RB4
PGC3/SOSCO/SCLKI/AN16/PWRLCLK/CLCINB/CN0/RA4
AN19/U1TX/CTED1/INT0/CN23/RB7
AN20/SCL1/U1CTS/OC1B/CTED10/CN22/RB8
AN21/SDA1/T1CK/U1RTS/U1BCLK/IC2/CLC1O/CTED4/CN21/RB9
IC1/OC1A/INT2/CN8/RA6
AN12/HLVDIN/SCK1/OC1C/CTED2/CN14/RB12
AN11/SDO1/OCFB/OC1D/CTPLS/CN13/RB13
CV
REF
/AN10/SDI1/C1OUT/OCFA/CTED5/INT1/CN12/RB14
AN9/REFO/SS1/TCKIA/CTED6/CN11/RB15
V
SS
/AV
SS
V
DD
/AV
DD
MCLR/V
PP
/RA5
PGC2/CV
REF
+ /V
REF
+/AN0/CN2/RA0
PGD2/CV
REF
-/V
REF
-/AN1/CN3/RA1
MCLR/V
PP
/RA5
PGC2/CV
REF
+ /V
REF
+/AN0/CN2/RA0
PGD2/CV
REF
-/V
REF
-/AN1/CN3/RA1
V
CAP OR
V
DDCORE
AN12/HLVDIN/SCK1/OC1C/CTED2/INT2/CN14/RB12
AN19/U1TX/IC1/OC1A/CTED1/INT0/CN23/RB7
PIC24FV08KM101
2013 Microchip Technology Inc.
Advance Information
CV
REF
-
DS33030A-page 5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
