Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
Rev. 05 — 23 December 2005
Product data sheet
1. General description
The 74HC1G125; 74HCT1G125 is a high-speed, Si-gate CMOS device.
The 74HC1G125; 74HCT1G125 provides one non-inverting buffer/line driver with 3-state
output. The 3-state output is controlled by the output enable input (pin OE). A HIGH level
at pin OE causes the output to assume a high-impedance OFF-state.
The bus driver output currents are equal compared to the 74HC125 and 74HCT125.
2. Features
s
s
s
s
s
s
Wide supply voltage range from 2.0 V to 6.0 V
Symmetrical output impedance
High noise immunity
Low power consumption
Balanced propagation delays
ESD protection:
x
HBM EIA/JESD22-A114-C exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V
s
Very small 5 pins packages
s
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
6.0 ns.
Symbol
t
PHL
,
t
PLH
C
i
C
PD
Parameter
Conditions
Min
-
-
V
I
= GND to V
CC
[1]
Typ
9
1.5
30
Max
-
-
-
Unit
ns
pF
pF
74HC1G125
propagation delay A to Y V
CC
= 5 V; C
L
= 15 pF
input capacitance
power dissipation
capacitance
-
Philips Semiconductors
74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
Table 1:
Quick reference data
…continued
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
6.0 ns.
Symbol
t
PHL
,
t
PLH
C
i
C
PD
Parameter
Conditions
Min
-
-
V
I
= GND to V
CC
−
1.5 V
[1]
Typ
10
1.5
27
Max
-
-
-
Unit
ns
pF
pF
74HCT1G125
propagation delay A to Y V
CC
= 5 V; C
L
= 15 pF
input capacitance
power dissipation
capacitance
-
[1]
C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
4. Ordering information
Table 2:
Ordering information
Package
Temperature range Name
74HC1G125
74HC1G125GW
74HC1G125GV
74HCT1G125
74HCT1G125GW
74HCT1G125GV
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP5
SC-74A
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface mounted package; 5 leads
SOT353-1
SOT753
−40 °C
to +125
°C
−40 °C
to +125
°C
TSSOP5
SC-74A
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
plastic surface mounted package; 5 leads
SOT353-1
SOT753
Description
Version
Type number
5. Marking
Table 3:
Marking
Marking code
HM
H25
TM
T25
Type number
74HC1G125GW
74HC1G125GV
74HCT1G125GW
74HCT1G125GV
74HC_HCT1G125_5
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 23 December 2005
2 of 16
Philips Semiconductors
74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
6. Functional diagram
2
A
Y
4
2
4
1
EN
mna119
1
OE
mna118
Fig 1. Logic symbol
Fig 2. IEC logic symbol
A
Y
OE
mna120
Fig 3. Logic diagram
7. Pinning information
7.1 Pinning
74HC1G125GW
74HCT1G125GW
OE
A
1
2
5
V
CC
OE
74HC1G125GV
74HCT1G125GV
1
5
V
CC
A
2
GND
3
001aad948
4
Y
GND
3
001aad949
4
Y
Fig 4. Pin configuration TSSOP5
Fig 5. Pin configuration SC-74A
7.2 Pin description
Table 4:
Symbol
OE
A
GND
Y
V
CC
Pin description
Pin
1
2
3
4
5
Description
output enable input (active LOW)
data input
ground (0 V)
data output
supply voltage
74HC_HCT1G125_5
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 23 December 2005
3 of 16
Philips Semiconductors
74HC1G125; 74HCT1G125
Bus buffer/line driver; 3-state
8. Functional description
8.1 Function table
Table 5:
Control
OE
L
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
Function table
[1]
Input
A
L
H
X
Output
Y
L
H
Z
9. Limiting values
Table 6:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
[1]
[1]
Min
−0.5
-
-
-
-
-
−65
Max
+7.0
±20
±20
±35
70
−70
+150
200
Unit
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input clamping current
output clamping current V
O
<
−0.5
V or
V
O
> V
CC
+ 0.5 V
output current
quiescent supply
current
ground current
storage temperature
total power dissipation
T
amb
=
−40 °C
to +125
°C
[2]
V
O
=
−0.5
V to (V
CC
+ 0.5 V)
[1]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Above 55
°C
the value of P
tot
derates linearly with 2.5 mW/K.
74HC_HCT1G125_5
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 23 December 2005
4 of 16
无线连接
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
