SSM3K56FS
MOSFETs
Silicon N-Channel MOS
SSM3K56FS
1. Applications
•
High-Speed Switching
2. Features
(1)
(2)
1.5-V gate drive voltage.
Low drain-source on-resistance
: R
DS(ON)
= 235 mΩ (max) (@V
GS
= 4.5 V)
R
DS(ON)
= 300 mΩ (max) (@V
GS
= 2.5 V)
R
DS(ON)
= 480 mΩ (max) (@V
GS
= 1.8 V)
R
DS(ON)
= 840 mΩ (max) (@V
GS
= 1.5 V)
3. Packaging and Pin Configuration
1: Gate
2: Source
3: Drain
SSM
Start of commercial production
1
2012-06
2014-04-04
Rev.2.0
SSM3K56FS
4. Absolute Maximum Ratings (Note) (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
Power dissipation
Power dissipation
Channel temperature
Storage temperature
(Note 1)
(Note 1),(Note 2)
(Note 3)
(Note 4)
Symbol
V
DSS
V
GSS
I
D
I
DP
P
D
P
D
T
ch
T
stg
Rating
20
±8
800
1600
150
500
150
-55 to 150
mW
mW
mA
Unit
V
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: Pulse width (PW)
≤
10 ms, duty = 1%
Note 3: Mounted on a FR4 board.(25.4 mm
×
25.4 mm
×
1.6 mm, Cu Pad: 0.36 mm
2
×
3)
Note 4: Mounted on a FR4 board.(25.4 mm
×
25.4 mm
×
1.6 mm, Cu Pad: 645 mm
2
)
Note:
Note:
Note:
The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables,
operators, soldering irons and other objects should be protected against anti-static discharge.
The channel-to-ambient thermal resistance, R
th(ch-a)
, and the power dissipation, P
D
, vary according to the
board material, board area, board thickness and pad area. When using this device, be sure to take heat
dissipation fully into account.
2
2014-04-04
Rev.2.0
SSM3K56FS
5. Electrical Characteristics
5.1. Static Characteristics (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
(Note 2)
(Note 3)
Symbol
I
GSS
I
DSS
Test Condition
V
GS
=
±6
V, V
DS
= 0 V
V
DS
= 16 V, V
GS
= 0 V
Min
20
15
0.4
Typ.
186
230
290
360
1.4
Max
±1
1
1.0
235
300
480
840
S
mΩ
V
Unit
µA
V
(BR)DSS
I
D
= 1 mA, V
GS
= 0 V
(Note 1) V
(BR)DSX
I
D
= 1 mA, V
GS
= -5 V
V
th
V
DS
= 3 V, I
D
= 1 mA
I
D
= 600 mA, V
GS
= 2.5 V
I
D
= 200 mA, V
GS
= 1.8 V
I
D
= 50 mA, V
GS
= 1.5 V
R
DS(ON)
I
D
= 800 mA, V
GS
= 4.5 V
Forward transfer admittance
(Note 3)
|Y
fs
|
V
DS
= 3 V, I
D
= 200 mA
Note 1: If a reverse bias is applied between gate and source, this device enters V
(BR)DSX
mode. Note that the drain-
source breakdown voltage is lowered in this mode.
Note 2: Let V
th
be the voltage applied between gate and source that causes the drain current (I
D
) to below (1 mA for
this device). Then, for normal switching operation, V
GS(ON)
must be higher than V
th
, and V
GS(OFF)
must be
lower than V
th
. This relationship can be expressed as: V
GS(OFF)
< V
th
< V
GS(ON)
.
Take this into consideration when using the device.
Note 3: Pulse measurement.
5.2. Dynamic Characteristics (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Input capacitance
Reverse transfer capacitance
Output capacitance
Switching time (turn-on time)
Switching time (turn-off time)
Symbol
C
iss
C
rss
C
oss
t
on
t
off
V
DD
= 10 V, I
D
= 200 mA
V
GS
= 0 to 2.5 V, R
G
= 50
Ω,
Duty
≤
1%, Input: t
r
, t
f
< 5 ns
Common source, See Chapter 5.3
Test Condition
V
DS
= 10 V, V
GS
= 0 V,
f = 1 MHz
Min
Typ.
55
6
16
5.5
8.5
Max
ns
Unit
pF
5.3. Switching Time Test Circuit
Fig. 5.3.1 Test Circuit of Switching Time
Fig. 5.3.2 Input Waveform/Output Waveform
3
2014-04-04
Rev.2.0
SSM3K56FS
5.4. Gate Charge Characteristics (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Total gate charge (gate-source plus gate-drain)
Gate-source charge 1
Gate-drain charge
Symbol
Q
g
Q
gs1
Q
gd
Test Condition
V
DD
= 10 V, V
GS
= 4.5 V,
I
D
= 800 mA
Min
Typ.
1.0
0.12
0.4
Max
Unit
nC
5.5. Source-Drain Characteristics (Unless otherwise specified, T
a
= 25
)
25
Characteristics
Diode forward voltage
(Note 1)
Symbol
V
DSF
Test Condition
I
D
= -800 mA, V
GS
= 0 V
Min
Typ.
-0.82
Max
-1.2
Unit
V
Note 1: Pulse measurement.
6. Marking
Fig. 6.1 Marking
4
2014-04-04
Rev.2.0
SSM3K56FS
7. Characteristics Curves (Note)
Fig. 7.1 I
D
- V
DS
Fig. 7.2 I
D
- V
GS
Fig. 7.3 R
DS(ON)
- V
GS
Fig. 7.4 R
DS(ON)
- I
D
Fig. 7.5 R
DS(ON)
- T
a
Fig. 7.6 V
th
- T
a
5
2014-04-04
Rev.2.0
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