Datasheet> 器件分类 > 嵌入式处理器和控制器> 微控制器和处理器> TS83C51RD2ZZZ-LILR

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TS83C51RD2ZZZ-LILR: 产品描述Microcontroller, 8-Bit, MROM, 8051 CPU, 30MHz, CMOS, PQCC68, PLASTIC, LCC-68; 产品类别嵌入式处理器和控制器微控制器和处理器; 文件大小447KB，共74页; 制造商Atmel (Microchip)

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TS83C51RD2ZZZ-LILR概述

Microcontroller, 8-Bit, MROM, 8051 CPU, 30MHz, CMOS, PQCC68, PLASTIC, LCC-68

TS83C51RD2ZZZ-LILR规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	Atmel (Microchip)
零件包装代码	LCC
包装说明	QCCJ, LDCC68,1.0SQ
针数	68
Reach Compliance Code	compli
ECCN代码	3A991.A.2
具有ADC	NO
地址总线宽度	16
位大小	8
CPU系列	8051
最大时钟频率	30 MHz
DAC 通道	NO
DMA 通道	NO
外部数据总线宽度	8
JESD-30 代码	S-PQCC-J68
JESD-609代码	e0
长度	24.2316 mm
湿度敏感等级	3
I/O 线路数量	48
端子数量	68
最高工作温度	85 °C
最低工作温度	-40 °C
PWM 通道	YES
封装主体材料	PLASTIC/EPOXY
封装代码	QCCJ
封装等效代码	LDCC68,1.0SQ
封装形状	SQUARE
封装形式	CHIP CARRIER
峰值回流温度（摄氏度）	225
电源	3/5 V
认证状态	Not Qualified
RAM（字节）	512
ROM（单词）	65536
ROM可编程性	MROM
座面最大高度	4.57 mm
速度	30 MHz
最大供电电压	5.5 V
最小供电电压	2.7 V
标称供电电压	3 V
表面贴装	YES
技术	CMOS
温度等级	INDUSTRIAL
端子面层	Tin/Lead (Sn/Pb)
端子形式	J BEND
端子节距	1.27 mm
端子位置	QUAD
处于峰值回流温度下的最长时间	30
宽度	24.2316 mm
uPs/uCs/外围集成电路类型	MICROCONTROLLER

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TS80C51RA2/RD2

TS83C51RB2/RC2/RD2

TS87C51RB2/RC2/RD2

High Performance 8-bit Microcontrollers

1. Description

Atmel Wireless & Microcontrollers TS80C51Rx2 is high

performance CMOS ROM, OTP, EPROM and ROMless

versions of the 80C51 CMOS single chip 8-bit

microcontroller.

The TS80C51Rx2 retains all features of the 80C51 with

extended ROM/EPROM capacity (16/32/64 Kbytes), 256

bytes of internal RAM, a 7-source , 4-level interrupt

system, an on-chip oscilator and three timer/counters.

In addition, the TS80C51Rx2 has a Programmable

Counter Array, an XRAM of 256 or 768 bytes, a

Hardware Watchdog Timer, a more versatile serial

channel that facilitates multiprocessor communication

(EUART) and a X2 speed improvement mechanism.

The fully static design of the TS80C51Rx2 allows to

reduce system power consumption by bringing the clock

frequency down to any value, even DC, without loss of

data.

The TS80C51Rx2 has 2 software-selectable modes of

reduced activity for further reduction in power

consumption. In the idle mode the CPU is frozen while

the timers, the serial port and the interrupt system are still

operating. In the power-down mode the RAM is saved

and all other functions are inoperative.

2. Features

•

80C52 Compatible

•

8051 pin and instruction compatible

•

Four 8-bit I/O ports

•

Three 16-bit timer/counters

•

256 bytes scratchpad RAM

•

High-Speed Architecture

•

40 MHz @ 5V, 30MHz @ 3V

•

X2 Speed Improvement capability (6 clocks/

machine cycle)

30 MHz @ 5V, 20 MHz @ 3V (Equivalent to

60 MHz @ 5V, 40 MHz @ 3V)

•

Dual Data Pointer

•

Hardware Watchdog Timer (One-time enabled with

Reset-Out)

•

2 extra 8-bit I/O ports available on RD2 with high

pin count packages

•

Asynchronous port reset

•

Interrupt Structure with

•

7 Interrupt sources,

•

4 level priority interrupt system

•

Full duplex Enhanced UART

•

Framing error detection

•

Automatic address recognition

•

Low EMI (inhibit ALE)

•

On-chip ROM/EPROM (16K-bytes, 32K-bytes, 64K-

bytes)

•

Power Control modes

•

Idle mode

•

Power-down mode

•

Power-off Flag

•

Once mode (On-chip Emulation)

•

On-chip eXpanded RAM (XRAM) (256 or 768 bytes)

•

Programmable Clock Out and Up/Down Timer/

Counter 2

•

Programmable Counter Array with

•

High Speed Output,

Compare / Capture,

Pulse Width Modulator,

Watchdog Timer Capabilities

•

Power supply: 4.5-5V, 2.7-5.5V

•

Temperature ranges: Commercial (0 to 70

C) and

Industrial (-40 to 85

•

Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44

(window), CDIL40 (window), PLCC68, VQFP64

1.4, JLCC68 (window)

Rev. C - 06 March, 2001

TS83C51RD2ZZZ-LILR

TS83C51RD2ZZZ-LILR概述

TS83C51RD2ZZZ-LILR规格参数

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