CTH2315NS-T52
N-Channel Enhancement MOSFET
Features
•
•
•
•
•
Drain-Source Breakdown Voltage V
DSS
150V
Drain-Source On-Resistance
R
DS(ON)
60m
Ω
,
at V
GS
= 10V, I
D
= 5A
Advanced high cell density Trench Technology
RoHS Compliance & Halogen Free
Description
The CTH2315NS-T52 is the N-Channel logic
enhancement mode power field effect transistors
are produced using high cell density, DMOS trench
I
D
=23A
technology. This high density process is especially
tailored to minimize on-state resistance.
Applications
•
•
•
DC/DC Converter
Load Switch
LCD/ LED Display inverter
Package Outline
Drain
Gate
Source
Source
CT Micro
Proprietary & Confidential
℃
Continuous Drain
Current at T
C
=25
Schematic
Drain
Gate
Page 1
Rev 1
Jun, 2015
CTH2315NS-T52
N-Channel Enhancement MOSFET
Absolute Maximum Rating at 25
o
C
Symbol
V
DS
V
GS
I
D
I
DM
P
D
T
STG
T
J
Parameters
Drain-Source Voltage
Gate-Source Voltage
Test Conditions
150
±20
23
90
85
-55 to 150
-55 to 150
Min
V
V
A
A
W
°
C
°
C
Note
Pulsed Drain Current
Total Power Dissipation @T
C
=25
Storage Temperature Range
Operating Junction Temperature Range
Thermal Characteristics
Symbol
R
JC
Parameters
Thermal Resistance
Case-Ambient
Test Conditions
CT Micro
Proprietary & Confidential
Page 2
℃
Min
--
Continuous Drain Current @T
C
=25
1
1
2
℃
Typ
1.4
Max
--
Units
o
C
Notes
1,4
/W
Rev 1
Jun, 2015
CTH2315NS-T52
N-Channel Enhancement MOSFET
Electrical Characteristics
T
Static Characteristics
Symbol
B
VDSS
I
DSS
I
GSS
Parameters
Drain-Source Breakdown Voltage
Drain-Source Leakage Current
Gate-Source Leakage Current
A
= 25° (unless otherwise specified)
C
Test Conditions
V
GS
= 0V, I
D
= 250µA
V
DS
= 120V, V
GS
= 0V
V
GS
=
±20V,
V
DS
= 0V
Min
150
-
-
Typ
-
-
-
Max
-
1
±100
Units
V
µA
nA
Notes
On Characteristics
Symbol
R
DS(ON)
V
GS(th)
Parameters
Drain-Source On-Resistance
Gate-Source Threshold Voltage
Test Conditions
V
GS
= 10V, I
D
= 5A
V
GS
= V
DS
, I
D
=250µA
Min
-
2.0
Typ
60
Max
75
4.0
Units
m
V
Notes
3
3
Dynamic Characteristics
Symbol
C
ISS
C
OSS
C
RSS
Parameters
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Test Conditions
V
GS
=0V,
V
DS
=345V
f=1MHz
Min
-
-
-
Typ
3250
115
55
Max
-
-
-
Units
Notes
pF
Switching Characteristics
Symbol
T
D(ON)
T
R
T
D(OFF)
T
F
Q
G
Q
GS
Q
GD
Parameters
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain (Miller) Charge
Test Conditions
V
DS
= 75V ,
V
GS
= 10V,
R
G
= 6 ,
I
D
=5A
V
DS
= 75V ,
V
GS
= 15V,
I
D
=5A
Min
-
-
-
-
-
-
-
Typ
32
21
96
51
36
13
17
Max
-
-
Units
Notes
ns
-
-
-
-
-
nC
CT Micro
Proprietary & Confidential
Page 3
Rev 1
Jun, 2015
CTH2315NS-T52
N-Channel Enhancement MOSFET
Drain-Source Diode Characteristics
Symbol
V
SD
I
SD
Parameters
Body Diode Forward Voltage
Body Diode Continuous Current
Test Conditions
V
GS
= 0V, I
SD
= 5A
Min
-
-
Typ
-
-
Max
1.3
1
Units
V
A
Notes
1
1
Note:
3. Thermal Resistance follow JESD51-3.
CT Micro
Proprietary & Confidential
Page 4
≦
μ
≦
2. The data tested by pulsed , pulse width
℃
1. The power dissipation is limited by 150
junction temperature.
300 s , duty cycle
2%
Rev 1
Jun, 2015
CTH2315NS-T52
N-Channel Enhancement MOSFET
Typical Characteristic Curves
CT Micro
Proprietary & Confidential
Page 5
Rev 1
Jun, 2015
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