INTEGRATED CIRCUITS
DATA SHEET
TDA8732
NICAM-728 demodulator (NIDEM)
Product specification
File under Integrated Circuits, IC02
April 1993
Philips Semiconductors
Product specification
NICAM-728 demodulator (NIDEM)
FEATURES
•
5 V supplies for analog and digital circuitry
•
Low cost application
•
Improved noise behaviour
•
Limiting amplifier for QPSK input
•
Suitable with PAL B, G and I NICAM-728 systems.
APPLICATIONS
•
NICAM-728 systems.
GENERAL DESCRIPTION
TDA8732
The NIDEM is a dedicated device providing a DQPSK
(Differential Quadrature Phase Shift Keying) demodulator
for a NICAM-728 system.
The device interfaces with NICAM-728 decoders and
provides data synchronized to a 728 kHz clock (either
supplied externally or by the on-board clock).
The device consists of a costas loop quadrature
demodulator, a bit-rate clock recovery and differential
decoder with parallel-to-serial conversion.
The Voltage Controlled Oscillator (VCO) used in the
costas loop is achieved with a single-pin crystal oscillator.
A second single-pin crystal oscillator with a divider chain
provides signals at 5.824 MHz and at 728 kHz.
The NIDEM is suitable for PAL B and G (carrier oscillator
crystal at 11.7 MHz) and PAL I (carrier oscillator crystal at
13.104 MHz).
QUICK REFERENCE DATA
Measured over full voltage and temperature ranges.
SYMBOL
V
CCA
V
CCD
V
CCA
I
CCA
I
CCD
V
3
R
I
C
I
f
CAROSC
f
XTAL
PARAMETER
analog supply voltage
digital supply voltage
analog supply voltage
analog supply current
digital supply current
QPSK input level (peak-to-peak value)
input resistance
input capacitance
carrier oscillator frequency
crystal frequency
PAL B, G
PAL I
f
CLKOSC
f
C5M
clock oscillator frequency
C5M output frequency
−
−
−
−
11.7
13.104
11.648
5.824
−
−
−
−
MHz
MHz
MHz
MHz
4.5
4.5
4.5
−0.5
−
−
30
1.75
−
11.5
MIN.
5
5
5
−
12.5
14.5
100
2.5
2
−
TYP.
MAX.
5.5
5.5
5.5
0.5
−
−
300
3.25
−
13.5
V
V
V
V
mA
mA
mV
kΩ
pF
MHz
UNIT
V
CCA
−V
CCD
differential supply voltage
ORDERING INFORMATION
EXTENDED
TYPE
NUMBER
TDA8732
Note
1. SOT146-1; 1996 December 3.
April 1993
2
PACKAGE
PINS
20
PIN POSITION
DIL
MATERIAL
plastic
CODE
SOT146
(1)
Philips Semiconductors
Product specification
NICAM-728 demodulator (NIDEM)
TDA8732
Fig.1 Block diagram.
April 1993
3
Philips Semiconductors
Product specification
NICAM-728 demodulator (NIDEM)
PINNING
SYMBOL
CLKLPF
V
EEA
QPSKIN
V
CCA
CFI
CFO
SFO
SFI
CARLPF
PIN
1
2
3
4
5
6
7
8
9
DESCRIPTION
transconductance output for bit-rate loop low-pass filter
ground for analog circuitry
QPSK modulated data input
power supply for analog circuitry
baseband cosine channel input after filtering
demodulated cosine channel output to low-pass filter
demodulated sine channel output to low-pass filter
baseband sine channel input after filtering
transconductance output for carrier loop low-pass filter
crystal input for carrier oscillator (frequency is 11.7 MHz
or 13.104 MHz)
monostable components connection for quadrature data
transition detector
power supply for digital circuitry
monostable components connection for in-phase data
transition detector
ground for digital circuitry
728 kbit/s demodulated and differentially decoded serial
data output
bit-rate clock input at 728 kHz, phase-locked to the data
output clock frequency at 728 kHz
reference frequency output at
5.824 MHz (8 x CLK)
input for test purpose (grounded for normal operation)
crystal input for clock oscillator (frequency is 11.648 MHz)
TDA8732
CAROSC 10
QMC
V
CCD
IMC
V
EED
DATA
CLKIN
CLK
C5M
TEST
CLKOS
11
12
13
14
15
16
17
18
19
20
Fig.2 Pin configuration.
April 1993
4
Philips Semiconductors
Product specification
NICAM-728 demodulator (NIDEM)
FUNCTIONAL DESCRIPTION
QPSK demodulator
The DQPSK signal input to the demodulator (QPSKIN) is
limited and fed into the costas loop demodulator. A
single-pin carrier oscillator (CAROSC), at twice the carrier
frequency, supplies a differential signal to the divider
circuitry, which drives the demodulators with both 0° and
90° phase shift. This produces cosine and sine signals
which are required for the carrier recovery. Cosine
(in-phase) and sine (in Quadrature) channel baseband
filters are then provided externally between pins CFO and
CFI, and SFO and SFI respectively. The two filtered
baseband signals are then processed to provide an error
signal, the magnitude and which of which bear a fixed
relationship to the phase error of the carrier, regardless of
which of the four rest-states the signal occupies. The
carrier recovery loop is closed with the aid of a single pin
loop filter connection at CARLPF, which filters the error
voltage signal to control the 728 kHz as shown in
application diagrams Fig.4 and 5.
Bit-rate clock recovery loop
The CFI and SFI channels are processed using edge
detectors and monostables, with externally derived time
constants (see Fig.3), to generate a signal with a coherent
component at the data bit symbol rate. This signal is
compared with the clock derived from CLKIN and used to
produce an error signal at the transconductance output
CLKLPF. This error signal is loop-filtered and used to
control the clock generator (at CLKOSC if the on-board
clock is used; see Fig.5).
Clock oscillator and timing generator
TDA8732
A voltage-controlled oscillator on-board the NIDEM
operates at 11.648 MHz and is divided down to produce a
728 kHz (bit-rate) clock output (CLK) which is phase
locked to the pulse stream and may be used as an
alternative clock input for NIDEM. A reference clock at
5.824 MHz is provided at pin C5M (TTL levels).
Differential decoder and parallel-to-serial converter
The recovered symbol-rate clocking-signal (364 kHz)
produced internally is passed to the demodulator where it
samples the sliced raised cosine pulse stream. The
recovered bit-rate clocking-signal is passed to the decoder
and is used to differentially decode the demodulated data
signal and reform it into a serial bit-stream.
April 1993
5
stm32/stm8
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