Copyright
Copyright © 1999 OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored
in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic,
mechanical, magnetic, optical, manual, or otherwise, without the prior written permission of OPTi Inc., 1440 McCarthy Blvd.
Milpitas, CA 95035.
Disclaimer
OPTi Inc. makes no representations or warranties with respect to the design and documentation herein described and
especially disclaims any implied warranties of merchantability or fitness for any particular purpose. Further, OPTi Inc. reserves
the right to revise the design and associated documentation and to make changes from time to time in the content without
obligation of OPTi Inc. to notify any person of such revisions or changes.
Trademarks
OPTi and OPTi Inc. are registered trademarks of OPTi Inc. All other trademarks and copyrights are the property of their
respective holders.
OPTi Inc.
1440 McCarthy Blvd.
Milpitas, CA 95035
Tel: (408) 486-8000
Fax: (408) 486-8001
WWW: http://www.opti.com
®
FireLink USB
82C862
T
ABLE OF
C
ONTENTS
1.0
2.0
3.0
FEATURES ......................................................................................................................................................................1
OVERVIEW ......................................................................................................................................................................1
SIGNAL DEFINITIONS ....................................................................................................................................................3
3.1.1
Terminology/Nomenclature Conventions..............................................................................................................3
3.2
N
UMERICAL
P
IN
C
ROSS
-R
EFERENCE
L
IST
.........................................................................................................................5
3.3
S
IGNAL
D
ESCRIPTIONS
....................................................................................................................................................6
3.3.1
Clock and Reset Interface Signals .......................................................................................................................6
3.3.2
PCI Bus Interface Signals.....................................................................................................................................6
3.3.3
USB Interface Signals ..........................................................................................................................................8
3.3.4
Host Controller shared signals: PME#, SMI#, REQ#, GNT# ................................................................................9
3.3.5
Legacy and Interrupt Interface Signals.................................................................................................................9
3.3.6
Power and Ground Pins .....................................................................................................................................10
3.3.7
Strap Options .....................................................................................................................................................11
4.0
FUNCTIONAL DESCRIPTION.......................................................................................................................................13
4.1
U
NIVERSAL
S
ERIAL
B
US
(USB) ......................................................................................................................................13
4.2
PCI C
ONTROLLER
.........................................................................................................................................................14
4.3
C
LOCK
G
ENERATION
.....................................................................................................................................................15
4.4
P
OWER
M
ANAGEMENT
F
EATURES
...................................................................................................................................15
4.4.1
Putting FireLink into USBSuspend State ............................................................................................................15
4.4.2
Powering Down the USB I/O Cells .....................................................................................................................15
4.4.3
Stopping the 48MHz USB Clock.........................................................................................................................15
4.4.4
Using CLKRUN# ................................................................................................................................................15
4.4.5
Stopping the Internal PCI Clocks........................................................................................................................16
4.4.6
Power Control Modes .........................................................................................................................................16
4.5
H
OST
C
ONTROLLER
.......................................................................................................................................................19
4.5.1
Legacy Support ..................................................................................................................................................20
4.5.2
Intercept Port 60h and 64h Accesses.................................................................................................................20
4.6
G
ENERAL
P
URPOSE
P
INS
...............................................................................................................................................21
5.0
REGISTER DESCRIPTIONS .........................................................................................................................................23
5.1
PCICFG R
EGISTER
S
PACE
...........................................................................................................................................23
5.1.1
Programming Differences from 82C861 Component..........................................................................................23
5.1.2
PCICFG 00h-FFh ...............................................................................................................................................24
5.2
H
OST
C
ONTROLLER
R
EGISTER
S
PACE
............................................................................................................................29
5.2.1
MEMOFST 00h-5Ch...........................................................................................................................................29
5.2.2
Legacy Support Registers ..................................................................................................................................39
5.2.3
MEMOFST 100h-1Fh (Legacy Support Registers).............................................................................................39
6.0
ELECTRICAL RATINGS................................................................................................................................................41
6.1
A
BSOLUTE
M
AXIMUM
R
ATINGS
.......................................................................................................................................41
6.2
DC C
HARACTERISTICS
: .................................................................................................................................................41
6.3
AC C
HARACTERISTICS
(P
RELIMINARY
) ............................................................................................................................42
6.3.1
PCI Bus AC Timings...........................................................................................................................................42
6.3.2
USB AC Timings: Full Speed Source .................................................................................................................43
6.3.3
USB AC Timings: Low Speed Source ................................................................................................................44
7.0
8.0
MECHANICAL PACKAGE OUTLINES .........................................................................................................................46
NAND TREE TEST MODE.............................................................................................................................................47
912-2000-030
Revision: 1.0
Page i
®
FireLink USB
82C862
• Implements CLKRUN# pin to support hardware-
enforced power-down
• Packaged as 100-pin LQFP (Low-profile Quad Flat
Pack)
• Supported by Windows 98, Windows 2000, and
Windows CE
1.0
Features
• Compliant with USB rev. 1.1 specification
• Fully compatible with USB OHCI specification
• Two independent host controllers, two ports each,
making FireLink USB a multi-function PCI device
• Second host controller can be disabled if not used
• Clock input can be derived from either a 12MHz crystal
or a 48MHz oscillator
• Clocks can be turned off when not in use to save power
• Core operates at 3.3V; PCI inputs are 5V-tolerant
• Incorporates PCI Power Management, supporting very
low power standby modes
2.0
Overview
This document describes the OPTi FireLink USB (82C862)
controller.
This PCI-to-USB bridge is unique in that it consists of two
independent dual-port controllers, each sharing only the
common PCI bus connection. This arrangement allows for
a total Universal Serial Bus bandwidth of 24Mb/s, divided
into 12Mb/s for each pair of ports.
Figure 1 provides a block diagram of the overall
functionality of the chip.
Figure 1.
82C862 FireLink USB Block Diagram
FireLink
USB
82C862
PCI
i n terface
C e n tr a l
Arbiter
port 1
USB
C o n tro ller
M odule 1
U S B C o n fig
R e gs Function 0
port 2
port 3
USB
C o n tro ller
M odule 2
U S B C o n fig
R e gs Function 1
R E Q #, GNT#
port 4
48MHz Clock
Generatio n
12M H z
xtal
912-2000-030
Revision: 1.0
Page 1
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