CXD1170M
6-bit 40MSPS High Speed D/A Converter
Description
The CXD1170M is a 6-bit 40MHz high speed D/A
converter. The adoption of a current output system
reduces power consumption to 80mW (200Ω load at
2Vp-p output).
This IC is suitable for digital TV and graphic
display applications.
Features
•
Resolution 6-bit
•
Max. conversion speed 40MSPS
•
Non linearity error within ±0.1LSB
•
Low glitch noise
•
TTL CMOS compatible input
•
+5V single power supply
•
Low power consumption 80mW
(200Ω load at 2Vp-p output)
24 pin SOP (Plastic)
Structure
Silicon gate CMOS IC
Function
6-bit 40MHz D/A converter
Block Diagram and Pin Configuration
NC
NC
1
2
24 DV
DD
23 DV
DD
22 AV
DD
DECODER
21
20
LATCHES
CURRENT
CELLS
IO
IO
(LSB) D0 3
D1
D2
4
5
D3 6
D4
D5
7
8
DECODER
19 AV
DD
18 AV
DD
17 VG
16 VREF
BLK 9
DV
SS
10
VB 11
CLK 12
CLOCK
GENERATOR
CURRENT CELLS
(FOR FULL SCALE)
BIAS VOLTAGE
GENERATOR
15 IREF
14 AV
SS
13 DV
SS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E89X37B6X-PS
CXD1170M
Absolute Maximum Ratings
(Ta = 25°C)
•
Supply voltage
V
DD
•
Input voltage
V
IN
•
Output current
I
OUT
•
Storage temperature
Tstg
Recommended Operating Conditions
•
Supply voltage
AV
DD
, AV
SS
DV
DD
, DV
SS
•
Reference input voltage
•
Clock pulse width
•
Operating temperature
V
REF
Tpw
1
Tpw
0
Topr
7
V
DD
to V
SS
15
–55 to +150
V
V
mA
°C
4.75 to 5.25
4.75 to 5.25
2.0
12.5 (Min)
12.5 (Min)
–20 to +75
V
V
V
ns
ns
°C
Pin Description and I/O Pins Equivalent Circuit
No.
Symbol
Equivalent circuit
DV
DD
3
Description
3 to 8
D0 to D5
to
8
DV
SS
DV
DD
Digital input
9
BLK
9
Blanking pin
No signal at "H" (Output 0V)
Output condition at "L"
DV
SS
DV
DD
DV
DD
11
VB
11
Connect a capacitor of about 0.1µF
DV
SS
DV
DD
12
CLK
12
Clock pin
Moreover all input pins are TTL-CMOS
compatible
DV
SS
10, 13
14
DV
SS
AV
SS
–2–
Digital GND
Analog GND
CXD1170M
No.
15
Symbol
IREF
Equivalent circuit
AV
DD
AV
DD
Description
Connect a resistance 16 times "16R" that of
output resistance value "R"
15
AV
DD
AV
SS
16
AV
DD
16
VREF
Set full scale output value
AV
SS
17
17
18, 19, 22
VG
AV
SS
Connect a capacitor of about 0.1µF
Analog V
DD
AV
DD
AV
DD
20
IO
20
Current output pin
Voltage output can be obtained by connecting
a resistance
AV
SS
AV
DD
21
IO
21
Inverted current output pin
Normally dropped to analog GND
AV
SS
23, 24
DV
DD
Digital V
DD
Eleoctrical Characteristics
Item
Resolution
Symbol
n
(f
CLK
= 40MHz, V
DD
= 5V, R
OUT
= 200Ω, V
REF
= 2.0V, Ta = 25°C)
Measurement conditions
Min.
Typ.
6
40
0.5
–0.3
–0.1
1.85
1.95
10
0.5
0.1
2.05
15
1
14.3MHz, at COLOR BAR DATA input
13
14.5
16
5
–5
5
10
10
R
OUT
= 75Ω
–3–
30
Max.
Unit
bit
MSPS
MHz
LSB
LSB
V
mA
mV
mA
µA
µA
ns
ns
ns
pV-s
Maximum conversion speed f
MAX
Minimum conversion speed f
MIN
Linearity error
Differential linear error
Full scale output voltage
Full scale output current
Offset output voltage
Power supply current
Digital
input current
Setup time
Hold time
Propagation delay time
Glitch energy
E
L
E
D
V
FS
I
FS
V
OS
I
DD
High level I
IH
Low level
I
IL
t
S
t
H
t
PD
GE
CXD1170M
Maximum conversion speed test circuit
6bit
COUNTER
with
LATCH
3 D0 (LSB)
•
•
•
4
8 D5
IO 20
200
OSCILLOSCOPE
AV
DD
VG 17
0.1µ
VREF 16
2V
AVss
1k
9 BLK
0.1µ
CLK
40MH
Z
SQUARE
WAVE
11 VB
12 CLK
IREF 15
3.3k
DC characteristics test circuit
3 D0 (LSB)
CONTROLLER
•
•
•
4
8 D5
IO 20
200
DVM
AV
DD
VG 17
0.1µ
VREF 16
2V
AVss
1k
9 BLK
0.1µ
CLK
40MH
Z
SQUARE
WAVE
11 VB
12 CLK
IREF 15
3.3k
Propagation delay time test circuit
3 D0 (LSB)
•
•
•
4
8 D5
IO 20
200
OSCILLOSCOPE
AV
DD
VG 17
0.1µ
VREF 16
1k
AVss
CLK
10MH
Z
SQUARE
WAVE
FREQUENCY
DEMULTIPLIER
9 BLK
0.1µ
11 VB
12 CLK
IREF 15
3.3k
Setup hold time and glitch energy test circuit
6bit
COUNTER
with
LATCH
DELAY
CONTROLLER
CLK
1MH
Z
SQUARE
WAVE
DELAY
CONTROLLER
3 D0 (LSB)
•
•
•
4
8 D5
IO 20
75
OSCILLOSCOPE
AV
DD
VG 17
0.1µ
VREF 16
1V
AVss
1k
9 BLK
0.1µ
11 VB
12 CLK
IREF 15
1.2k
–4–
CXD1170M
Operation
Timing Chart
T
PW1
T
PW0
CLK
t
S
t
H
t
S
t
H
t
S
t
H
DATA
t
PD
100%
D/A OUT
t
PD
t
PD
50%
0%
Application Circuit
DV
DD
1
2
(LSB)
3
4
6bit
DIGITAL
INPUT
5
6
7
8
9
10
0.1µ
11
12
14
13
DGND
22
21
AGND
20
200
19
18
0.1µ
17
2V
16
15
3.3k
1k
D/A OUT
24
23
AV
DD
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
I/O Chart
(when full scale output voltage at 2.00V)
Input code
MSB
1 1 1 1
:
1 0 0 0
:
0 0 0 0
LSB
1 1
0 0
0 0
Output voltage
2.0V
1.0V
0V
–5–
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