CXA3286R
8-bit 160MSPS Flash A/D Converter
Description
The CXA3286R is an 8-bit high-speed flash A/D
converter capable of digitizing analog signals at the
maximum rate of 160MSPS. ECL, PECL or TTL can
be selected as the digital input level in accordance
with the application. The TTL digital output level
allows 1: 2 demultiplexed output.
Features
•
Differential linearity error: ±0.5LSB or less
•
Integral linearity error: ±0.5LSB or less
•
Maximum conversion rate of 160MSPS
•
Low input capacitance: 10pF
•
Power saving function
•
Wide analog input bandwidth: 250MHz
•
Low power consumption: 550mW
•
1: 2 demultiplexed output
•
1/2 frequency-divided clock output
(with reset function)
•
Compatible with ECL, PECL and TTL digital input
levels
•
TTL output "H" levels: 2.8V (Typ.)
•
Output voltage control function (VOCLP)
•
+3.3V line CMOS IC direct connecting available
•
Single +5V power supply operation available
•
Ultra-small surface mounting package (48-pin LQFP)
DGND3
48 pin LQFP (Plastic)
LEAD TREATMENT: PALLADIUM PLATING
Structure
Bipolar silicon monolithic IC
Applications
•
LCD monitors
•
LCD projectors
V
RM
3
AV
CC
12 11 10
CLK/E 13
CLKN/E 14
CLK/T 15
SELECT2 16
VOCLP 17
PS 18
DV
CC
2 19
DGND2 20
PAD0 21
PAD1 22
PAD2 23
PAD3 24
9
8
7
6
5
V
RB
2
4
3
DV
EE
3
1
48 RESETN/E
47 RESET/E
46 RESETN/T
45 SELECT1
44 INV
43 CLKOUT
42 DV
CC
2
41 DGND2
40 PBD7
39 PBD6
38 PBD5
37 PBD4
AGND
25 26 27 28 29 30 31 32 33 34 35 36
DGND2
DGND1
PBD1
AGND
Pin Configuration
(Top View)
AV
CC
V
RM
2
V
RT
V
RM
1
V
IN
PAD7
PAD5
DV
CC
1
PBD0
PAD4
PAD6
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
DV
CC
2
PBD2
PBD3
E98774-PS
CXA3286R
Absolute Maximum Ratings
(Ta = 25°C)
Unit
•
Supply voltage
AV
CC
, DV
CC
1, DV
CC
2
–0.5 to +7.0
V
DGND3
–0.5 to +7.0
V
DV
EE
3
–7.0 to +0.5
V
DGND3 – DV
EE
3
–0.5 to +7.0
V
V
RT
– 2.7 to AV
CC
V
•
Analog input voltage
V
IN
•
Reference input voltage
V
RT
2.7 to AV
CC
V
V
IN
– 2.7 to AV
CC
V
V
RB
|V
RT
– V
RB
|
2.5
V
•
Digital input voltage
ECL/PECL input pin
DV
EE
3 – 0.5 to DGND3 + 0.5
V
V
TTL input pin
DGND1 – 0.5 to DV
CC
1 + 0.5
SELECT2 pin
DGND1 – 0.5 to DV
CC
1 + 0.5
V
V
VOCLP pin
DGND1 – 0.5 to DV
CC
1 + 0.5
∗
1
(|
∗∗∗
/E –
∗∗∗
N/E|)
VID
2.7
V
•
Storage temperature
Tstg
–65 to +150
°C
•
Allowable power dissipation P
D
1.4
W
(when mounted on a two-layer glass fabric base epoxy board with dimentions of 50mm
×
50mm, 1.6mm thick)
Recommended Operating Conditions
With a single power supply With dual power supply Unit
Min.
Typ.
Max.
Min.
Typ.
Max.
Supply voltage
DV
CC
1, DV
CC
2, AV
CC
+4.75
+5.0
+5.25 +4.75
+5.0
+5.25
V
DGND1, DGND2, AGND –0.05
0
+0.05 –0.05
0
+0.05
V
DGND3
+4.75
+5.0
+5.25 –0.05
0
+0.05
V
–0.05
0
+0.05
–5.5
–5.0
–4.75
V
DV
EE
3
Analog input voltage
V
IN
V
RB
V
RT
V
RB
V
RT
V
Reference input voltage V
RT
+2.9
+4.1
+2.9
+4.1
V
V
RB
+1.4
+2.6
+1.4
+2.6
V
|V
RT
– V
RB
|
1.5
2.1
1.5
2.1
V
Digital input voltage
ECL/PECL input pin : V
IH
DV
EE
3 + 1.5
DGND3 DV
EE
3 + 1.5
DGND3
V
: V
IL
DV
EE
3 + 1.1
V
IH
– 0.4 DV
EE
3 + 1.1
V
IH
– 0.4 V
TTL input pin
: V
IH
2.0
2.0
V
: V
IL
0.8
0.8
V
SELECT2 pin
: V
IH
DV
CC
1
DV
CC
1
V
: V
IL
DGND1
DGND1
V
VOCLP pin
DGND1 + 2.4
DV
CC
1 DGND1 + 2.4
DV
CC
1 V
∗
1
(|
∗∗∗
/E –
∗∗∗
N/E|)
VID
0.4
0.8
0.4
0.8
V
Maximum conversion rate Fc (Straight mode)
125
125
MSPS
(DMUX mode)
160
160
MSPS
Ambient temperature Ta
–20
+75
–20
+75
°C
•
•
•
•
•
•
∗
1
VID: Input Voltage Differential
ECL and PECL input signal switching level
DGND3
V
IH
(max.)
V
IL
V
TH
(DGND3 – 1.2V)
VID
V
IH
V
IL
(min.)
–2–
CXA3286R
Pin Description
[Symbol]
DV
EE
3
V
RB
AGND
V
RM
1
AV
CC
V
IN
V
RM
2
AV
CC
V
RM
3
AGND
V
RT
DGND3
CLK/E
CLKN/E
CLK/T
SELECT2
VOCLP
PS
DV
CC
2
DGND2
PAD0 to PAD7
DGND1
DV
CC
1
DV
CC
2
DGND2
PBD0 to PBD7
DGND2
DV
CC
2
CLKOUT
INV
SELECT1
RESETN/T
RESET/E
RESETN/E
[Pin No.]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21 to 28
29
30
31
32
33 to 40
41
42
43
44
45
46
47
48
[Description]
Digital power supply
Bottom reference voltage
Analog ground
Reference voltage mid point
Analog power supply
Analog signal input
Reference voltage mid point
Analog power supply
Reference voltage mid point
Analog ground
Top reference voltage
Digital power supply
Typical voltage
level with a single
power supply
0V
1.4 to 2.6V
0V
—
+5V
V
RB
to V
RT
—
+5V
—
0V
2.9 to 4.1V
+5V
Typical voltage
level with dual
power supply
–5.0V
1.4 to 2.6V
0V
—
+5V
V
RB
to V
RT
—
+5V
—
0V
2.9 to 4.1V
0V
ECL
ECL
TTL
DGND1 or open or DVcc1
Clamp voltage
TTL
+5V
0V
TTL
0V
+5V
+5V
0V
TTL
0V
+5V
TTL
TTL
TTL
TTL
ECL
ECL
ECL/PECL clock input
PECL
ECL/PECL clock input
PECL
TTL clock input
TTL
Data output switching
DGND1 or open or DVcc1
TTL high level clamp
Clamp voltage
Power saving
TTL
Digital power supply
+5V
Digital ground
0V
PA side data output
TTL
Digital ground
0V
Digital power supply
+5V
Digital power supply
+5V
Digital ground
0V
PB side data output
TTL
Digital ground
0V
Digital power supply
+5V
Clock output
TTL
Data output polarity inversion
TTL
TTL
Output mode selection
TTL reset input
TTL
PECL
ECL/PECL reset input
ECL/PECL reset input
PECL
–3–
CXA3286R
Block Diagram
AV
CC
5
V
RT
11
r
1
r
/2
r
1
INV
44
DV
CC
1
30
DV
CC
2
19 31 42
DGND3
12
8
(MSB)
40 PBD7
39 PBD6
2
•
•
•
r
6bit
38 PBD5
r
VRM3 9
r
LATCH B
TTLOUT
63
8bit
37 PBD4
36 PBD3
35 PBD2
64
r
65
r
r
•
•
•
6bit
34 PBD1
126
6bit LATCH + ENCODER
33 PBD0
(LSB)
127
VRM2 7
V
IN
6
r
128
r
129
ENCODER
(MSB)
28 PAD7
27 PAD6
26 PAD5
r
VRM1 4
r
•
•
•
6bit
191
LATCH A
LATCH B
TTLOUT
192
r
193
25 PAD4
24 PAD3
23 PAD2
22 PAD1
8bit
6bit
r
r
•
•
•
254
255
r
2
V
RB
2
CLK/T 15
CLK/E 13
CLKN/E 14
r
/2
21 PAD0
(LSB)
16 SELECT2
17 VOCLP
18 PS
D
Q
Q
Select
43 CLKOUT
RESETN/T 46
RESETN/E 48
RESET/E 47
3 10
AGND
45
SELECT1
29
DGND1
20 32 41
DGND2
1
DV
EE
3
–4–
CXA3286R
Pin Description and I/O Pin Equivalent Circuit
Pin
No.
3, 10
Symbol
AGND
I/O
Standard
voltage level
GND
+5V
(typ.)
GND
+5V
(typ.)
+5V (typ.)
(With a
single
power
supply)
GND
(With dual
power
supply)
GND
(With a
single
power
supply)
–5V (typ.)
(With dual
power
supply)
DV
CC
1
r
Equivalent circuit
Description
Analog ground.
Separated from the digital ground.
Analog power supply.
Separated from the digital power
supply.
Digital ground.
Digital power supply.
5, 8
AV
CC
20, 29 DGND1
32, 41 DGND2
19, 30 DV
CC
1
31, 42 DV
CC
2
12
DGND3
Digital power supply.
Ground for ECL input.
+5V for PECL and TTL inputs.
1
DV
EE
3
Digital power supply.
–5V for ECL input.
Ground for PECL and TTL inputs.
16
SELECT2
I
DVcc1
or
Open
or
DGND1
r
16
r
DGND1
Data output switching.
When left open, data are output
from both PA and PB side output
ports.
For DVcc1 level, PA side output port
outputs data and PB side is in the
high impedance state.
For DGND1 Ievel, PB side output
port outputs data and PA side is in
the high impedance state.
DV
CC
2
3k
17
VOCLP
I
Clamp
voltage
3.5k
17
DGND2
TTL output high level clamping.
The TTL high level voltage is
clamped to the value almost
equivalent to the voltage applied to
this pin .
Even if this pin is left open, the TTL
high level is clamped to
approximately 2.8V.
–5–
嵌入式系统
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