COMMUNICATION ICs
DATA BULLETIN
CMX980A
Digital Radio
Baseband Processor
Advance Information
Features
•
•
•
•
RRC Filters for both Tx and Rx
π
/4 DQPSK Modulation
2 x 14-Bit Resolution Sigma Delta D-A
2 x 16-Bit Resolution Sigma Delta A-D
•
•
•
•
4 x 10-Bit D-A and 4 Input 10-Bit A-D
Transmit Output Power Control
Low Power 3.0 - 5.5Volt Operation
Effective Power down Modes
CMX980A
A-D
RF Modulator
D
'I'
A
Cartesian Loop
Linear PA
Vocoder
Channel Coding.
TDMA Frame
Formatting
p
/4
DQPSK
RRC
90°
D
RRC
A
S
'Q'
TETRA Transmitter
Carrier
Oscillator
Local
Oscillator
RF Amp
Bandpass
Filter
Oscillator
D
A
A
D
A
A
D
CMX980A
IF Amp
90°
D
'I'
'Q'
TETRA Receiver
CMX980A
Voice
Decoder
p
/4 DQPSK
Demodulator,
Channel Decoder,
TDMA Framing
A
RRC
D
TETRA
Auxiliary
Functions
'I'
D-A
A
RRC
D
'Q'
Example: CMX980A in a TETRA System Application
This device is intended to act as an interface between the analog and digital sections of a Digital Radio
System, and performs many critical and DSP-intensive functions. The chip is designed with the necessary
capability to meet the requirements for use in both mobile and base station applications in Terrestrial Trunked
Radio (TETRA) systems, but the architecture is sufficiently flexible to allow use in other systems.
The transmit path comprises all the circuitry required to convert digital data into suitably filtered analog
I and Q signals for subsequent up-conversion and transmission. This includes digital control of the output
amplitudes, digital control of the output offsets and fully programmable digital filters: default coefficients
provide the RRC response required for TETRA.
The receive section accepts differential analog I and Q signals at baseband and converts these into a suitably
filtered digital form for further processing and data extraction. A facility is provided for digital offset correction
and the digital filters are fully programmable with default coefficients providing the RRC response required for
TETRA.
Auxiliary DAC and ADC functions are included for the control and measurement of the RF section of the radio
system. This may include AFC, AGC, RSSI, or may be used as part of the control system for a Cartesian
Loop.
The CMX980A requires a 3.0V to 5.0V supply and is available in the following packages: 44-pin PLCC
(CMX980AL6) and 44-pin QFP (CMX980AL7).
2000
MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. 20480201.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA
All trademarks and service marks are held by their respective companies
Digital Radio Baseband Processor
2
CMX980A Advance Information
CONTENTS
Section
Page
1 Block Diagram................................................................................................................ 4
2 Signal List....................................................................................................................... 5
3 External Components.................................................................................................... 7
3.1
3.2
Rx Inputs ............................................................................................................................. 7
Tx Outputs ........................................................................................................................... 7
4 General Description....................................................................................................... 8
4.1
4.2
4.3
Connection and Decoupling of Power Supplies .................................................................. 8
Programmable FIR Filter Architecture ................................................................................. 9
Tx Data Path........................................................................................................................ 9
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
Modulator ............................................................................................................................. 10
Filters.................................................................................................................................... 10
Gain Multiplier ...................................................................................................................... 10
Offset Adjust......................................................................................................................... 10
Sigma-Delta D-A Converters and Reconstruction Filters ..................................................... 10
Phase Pre-distortion............................................................................................................. 10
Ramping Output Amplitude .................................................................................................. 10
Symbol Clock Phase Adjustment ......................................................................................... 11
1.5.3.9 Direct Write to Tx 79-tap Filter Input ........................................................................ 11
4.3.10 Test Access to DAC Input .................................................................................................... 11
4.4
Rx Data Path ..................................................................................................................... 11
4.4.1
4.4.2
4.4.3
4.4.4
Anti-Alias Filtering and Sigma-Delta A-D Converters........................................................... 11
Rx FIR Filters ....................................................................................................................... 11
Offset Registers.................................................................................................................... 12
I and Q Channel Gain........................................................................................................... 12
10-Bit DACs.......................................................................................................................... 12
10-Bit ADC ........................................................................................................................... 12
Power Ramping and Control ................................................................................................ 12
4.5
Auxiliary Circuits ................................................................................................................ 12
4.5.1
4.5.2
4.5.3
4.6
4.7
IRQ Function ..................................................................................................................... 12
Serial Interface .................................................................................................................. 13
4.7.1
4.7.2
4.7.3
4.7.4
4.7.5
4.7.6
4.7.7
Command Interface.............................................................................................................. 14
Command Read Interface .................................................................................................... 14
Rx Data Interface ................................................................................................................. 14
Transmission of Data ........................................................................................................... 15
Command Control Serial Word ............................................................................................ 16
Coefficient Memory .............................................................................................................. 17
Auto Power Save Mode........................................................................................................ 18
2000
MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. 20480201.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA
All trademarks and service marks are held by their respective companies
Digital Radio Baseband Processor
3
CMX980A Advance Information
4.8
Register Description .......................................................................................................... 18
4.8.1
4.8.2
4.8.3
Key to Register Map............................................................................................................. 18
Register Reset State ............................................................................................................ 18
Register and Access Point Summary................................................................................... 19
5 Application Notes ........................................................................................................ 64
5.1
Interrupt Handling .............................................................................................................. 64
5.1.1
5.1.2
5.1.3
Tx FIFO status interrupts...................................................................................................... 64
Tx/Rx FIR filter tap overflow and Gain, Phase and Offset overflow interrupts ..................... 64
Rx ADC I and Q channel overflow - due to excessive input amplitude interrupts ................ 64
5.2
5.3
5.4
Configuration ..................................................................................................................... 64
Reset ................................................................................................................................. 64
Developing and Optimizing FIR Filter Coefficients ............................................................ 64
5.4.1
5.4.2
5.4.3
Tx Path Details ..................................................................................................................... 65
Rx Path Details..................................................................................................................... 66
General Procedure for Reconfiguring the CMX980A FIR Filters.......................................... 67
5.5
5.6
Receiver Re-Synchronization ............................................................................................ 68
Guidelines for use of Power Save Modes ......................................................................... 69
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
Auxiliary Section................................................................................................................... 69
Tx Section ............................................................................................................................ 69
Rx Section ............................................................................................................................ 69
Tx and Rx Bias Section ........................................................................................................ 69
Serial Interface Section ........................................................................................................ 69
6 Performance Specification.......................................................................................... 70
6.1
Electrical Performance ...................................................................................................... 70
6.1.1
6.1.2
6.1.3
Absolute Maximum Ratings.................................................................................................. 70
Operating Limits ................................................................................................................... 71
Operating Characteristics..................................................................................................... 72
6.2
Packaging.......................................................................................................................... 82
MX-COM, Inc. reserves the right to change specifications at any time and without notice.
2000
MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. 20480201.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA
All trademarks and service marks are held by their respective companies
Digital Radio Baseband Processor
4
CMX980A Advance Information
1 Block Diagram
Figure 1: Block Diagram
2000
MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
Doc. 20480201.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA
All trademarks and service marks are held by their respective companies
Digital Radio Baseband Processor
5
CMX980A Advance Information
2 Signal List
Packages
44-pin PLCC
(L6)
Pin No.
15
16
17
18
19
20
11
12
23
14
24
25
26
30
29
42
41
38
37
43
44
1
2
10
9
8
7
36
35
32
33
34
44-pin QFP
(L7)
Pin No.
9
10
11
12
13
14
5
6
17
8
18
19
20
24
23
36
35
32
31
37
38
39
40
4
3
2
1
30
29
26
27
28
Name
MCLK
SClk
CmdDat
CmdFS
CmdRdDat
CmdRdFS
RxDat
RxFS
N_IRQ
N_RESET
~
ITXP
ITXN
QTXP
QTXN
IRXP
IRXN
QRXP
QRXN
AUXADC1
AUXADC2
AUXADC3
AUXADC4
AUXDAC1
AUXDAC2
AUXDAC3
AUXDAC4
BIAS1
BIAS2
V
CC1
V
CC2
V
CC3
Type
input
output
bi-directional
input
output
output
output
output
output
input
input
output
output
output
output
input
input
input
input
input
input
input
input
output
output
output
output
bi-directional
bi-directional
Power
Power
Power
Master clock input (typically 9.216MHz)
Serial interface clock
Command serial interface Data
Command serial interface Frame
Command serial interface Read Data
Command serial interface Read Frame
Receive serial interface Data
Receive serial interface Strobe
Interrupt request
Chip Reset
For manufacturers use only. Connect
this pin to V
SS.
Transmit "I" channel, positive output
Transmit "I" channel, negative output
Transmit "Q" channel, positive output
Transmit "Q" channel, negative output
Receive "I" channel, positive input
Receive "I" channel, negative input
Receive "Q" channel, positive input
Receive "Q" channel, negative input
Auxiliary ADC channel 1
Auxiliary ADC channel 2
Auxiliary ADC channel 3
Auxiliary ADC channel 4
Auxiliary DAC channel 1
Auxiliary DAC channel 2
Auxiliary DAC channel 3
Auxiliary DAC channel 4
Analog bias level. This pin should be
decoupled to V
SSB.
DAC reference level. This pin should
normally be connected to V
SSB
.
I Channel analog positive supply rail.
This pin should be decoupled to V
SS1.
Q Channel analog positive supply rail.
This pin should be decoupled to V
SS2.
Analog Bias positive supply rail. Levels
and voltages are dependent upon this
supply. This pin should be decoupled to
V
SSB.
Auxiliary analog positive supply rail. This
pin should be decoupled to V
SSA.
Doc. 20480201.001
Signal
Description
6
44
V
DD1
Power
2000
MX-COM, Inc.
www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054
4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA
All trademarks and service marks are held by their respective companies
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