COMMUNICATION SEMICONDUCTORS
CMX909B
GMSK
Packet Data Modem
DATA BULLETIN
FEATURES and APPLICATIONS
•
•
•
•
•
GMSK Modulation/Demodulation
Rx or Tx up to 38.4kbits/sec
Full and Short Data Packet Framing
Mobitex Compatible including
R14N Short Block Frames
Envelope/End of Packet Detector for
’continuously keyed carrier’ systems
TM
•
•
•
•
On-chip Packet Detection
Parallel Host Processor Interface
Low Power 3.0V/5.0V Operation
Flexible Operating and Powersave Modes
Add Frame
Header
CMX909B
HOST µC
Scramble
Data
Interleave
Data
FEC & CRC
Encoding
Data
Buffer
DATA AND
CONTROL
BUS
RADIO
ANALOG Tx
GMSK
Modulator
MODULATOR
RF
DISCRIMINATOR
ANALOG Rx
GMSK
Demodulator
Descramble
Data
Deinterleave
Data
FEC & CRC
Decoding
SYSTEM
APPLICATION
PROCESSING
Frame Sync.
and Data
Detection
GMSK MODEM
The CMX909B is a half-duplex Gaussian Minimum Shift Keyed (GMSK) BT=0.3 modem data pump with on-
chip packet data handling. GMSK modulation optimizes the data throughput for a given bandwidth RF
channel and the on-chip packet data handling relieves the host µC of regular processing tasks, such as
maintaining Bit and Frame Synchronization, Block Formatting, CRC and FEC Error Processing, Data
Interleaving and Scrambling. The demodulator uses decision feedback equalization techniques to reduce the
channel distortion effects and enhance the receiver performance without the computational overhead of
maximum likelihood (Viterbi) estimation methods.
The CMX909B is pin, function and software backwards compatible with the FX909A and MX909A modems
and also uses the same external components. It offers improved performance, higher data rates, lower
voltage operation, support for the recent R14N extension to Mobitex for short block frames, and an
Envelope/End of Packet detector to facilitate frame start detection in ‘continuously keyed carrier’ systems.
The CMX909B also offers 2-strength XTAL driver circuitry – for wider choice of XTALs, optional zero-error or
one-error frame sync. detection, multiple powersave options – for intelligent power management, and
availability in small 24-pin TSSOP and SSOP package options.
The CMX909B is ideally suited to wireless data applications such as Mobitex terminals, wireless telemetry,
license-free radio data and ISM band radio schemes.
Mobitex
TM
is a trademark of Telia AB, Sweden
ã
2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480226.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
GMSK Packet Data Modem
2 of 43
CMX909B Advance Information
CONTENTS
Section
Page
1. Block Diagram ............................................................................................................... 4
2. Signal List ...................................................................................................................... 5
3. External Components ................................................................................................... 6
4. General Description ...................................................................................................... 7
4.1
Description of Blocks ......................................................................................................... 7
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
4.1.6
4.1.7
4.1.8
4.1.9
Data Bus Buffers..................................................................................................................... 7
Address and R/W Decode ...................................................................................................... 7
Status and Data Quality Registers.......................................................................................... 7
Command, Mode and Control Registers ................................................................................ 7
Data Buffer.............................................................................................................................. 7
CRC Generator/Checker ........................................................................................................ 7
FEC Generator/Checker ......................................................................................................... 7
Interleave/De-interleave Buffer ............................................................................................... 7
Frame Sync Detect ................................................................................................................. 8
4.1.10 Rx I/P Amp.............................................................................................................................. 8
4.1.11 Tx/Rx Low Pass Filter ............................................................................................................. 8
4.1.12 Tx Output Buffer...................................................................................................................... 8
4.1.13 Rx Level/Clock Extraction....................................................................................................... 9
4.1.14 Clock Oscillator and Dividers.................................................................................................. 9
4.1.15 Scramble/De-scramble ........................................................................................................... 9
4.2
4.3
Modem - µC Interaction ................................................................................................... 10
Data Formats ................................................................................................................... 11
4.3.1
General Purpose Formats .................................................................................................... 11
Mobitex Frame Structure ................................................................................................ 11
4.3.1.1
4.4
The Programmer’s View................................................................................................... 12
4.4.1
4.4.2
Data Buffer............................................................................................................................ 12
Command Register ............................................................................................................... 13
Command Register B7: AQBC - Acquire Bit Clock ........................................................ 13
Command Register B6: AQLEV - Acquire Receive Signal Levels ................................. 13
Command Register B5: - EOP End of Packet Detector ................................................ 14
Command Register B4: - ENV Envelope Detector........................................................ 14
Command Register B3, B2, B1, B0: TASK - Task ......................................................... 15
Control Register B7, B6: CKDIV - Clock Division Ratio ................................................. 22
B5:
HI/LO
- Xtal Range Selection ................................................................................. 22
Control Register B4: DARA - Data Rate and Mode Register B0 - HIBW ....................... 22
Control Register B3, B2: LEVRES - Level Measurement Response Time .................... 23
Control Register B1, B0: PLLBW ................................................................................... 23
4.4.2.1
4.4.2.2
4.4.2.3
4.4.2.4
4.4.2.5
4.4.3
4.4.3.1
4.4.3.2
4.4.3.3
4.4.3.4
4.4.3.5
Control Register .................................................................................................................... 22
ã
2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480226.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
GMSK Packet Data Modem
3 of 43
CMX909B Advance Information
4.4.4
Mode Register....................................................................................................................... 23
Mode Register B7:
IRQ EN
-
IRQ
Output Enable ........................................................ 23
Mode Register B6: INVBIT - Invert Bits.......................................................................... 24
Mode Register B5:
TX/RX
- Tx/Rx Mode...................................................................... 24
Mode Register B4: SCREN - Scramble Enable ............................................................. 24
Mode Register B3: PSAVE - Powersave........................................................................ 24
Mode Register B2: DQEN - Data Quality IRQ Enable ................................................... 24
Mode Register B1: HIXTL - High Xtal Drive ................................................................... 24
Mode Register B0: HIBW - High Filter Bandwidth.......................................................... 24
Status Register B7: IRQ - Interrupt Request .................................................................. 25
Status Register B6: BFREE - Data Buffer Free ............................................................. 25
Status Register B5: IBEMPTY - Interleave Buffer Empty............................................... 25
Status Register B4: DIBOVF - De-Interleave Buffer Overflow ....................................... 26
Status Register B3: CRCFEC - CRC or FEC Error ........................................................ 26
Status Register B2: DQRDY - Data Quality Reading Ready ......................................... 26
Status Register B1:
MO/BA
- Mobile or Base Bit Sync Received ................................ 26
Status Register B0: EOP/ENV - End of Packet/Envelope Detect .................................. 26
4.4.4.1
4.4.4.2
4.4.4.3
4.4.4.4
4.4.4.5
4.4.4.6
4.4.4.7
4.4.4.8
4.4.5
4.4.5.1
4.4.5.2
4.4.5.3
4.4.5.4
4.4.5.5
4.4.5.6
4.4.5.7
4.4.5.8
4.4.6
Status Register ..................................................................................................................... 25
Data Quality Register............................................................................................................ 27
CRC ...................................................................................................................................... 28
FEC....................................................................................................................................... 28
Interleaving ........................................................................................................................... 29
Scrambling ............................................................................................................................ 30
4.5
CRC, FEC, Interleaving and Scrambling Information: ...................................................... 28
4.5.1
4.5.2
4.5.3
4.5.4
5. Application Notes........................................................................................................ 30
5.1
5.2
5.3
5.4
5.5
6.1
Transmit Frame Example................................................................................................. 30
Receive Frame Example.................................................................................................. 32
Clock Extraction and Level Measurement Systems.......................................................... 34
AC Coupling..................................................................................................................... 36
Radio Performance .......................................................................................................... 37
Electrical Performance..................................................................................................... 38
6.1.1
6.1.2
6.1.3
6.1.4
Absolute Maximum Ratings .................................................................................................. 38
Operating Limits.................................................................................................................... 38
Operating Characteristics ..................................................................................................... 39
Timing Diagrams................................................................................................................... 40
6. Performance Specification ......................................................................................... 38
6.2
Packaging........................................................................................................................ 42
MX-COM, Inc. reserves the right to change specifications at any time and without notice.
ã
2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480226.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
GMSK Packet Data Modem
4 of 43
CMX909B Advance Information
1. Block Diagram
IRQ
8
D0
D1
D2
D3
DATA
BUS
BUFFERS
COMMAND
REGISTER
MODE
REGISTER
CONTROL
REGISTER
STATUS
REGISTER
DATA
QUALITY
REGISTER
µCONTROLLER
INTERFACE
D4
D5
D6
D7
WR
RD
CS
A0
A1
V
DD
V
BIAS
DATA
BUFFER
CRC
GENERATOR/
CHECKER
ADDRESS
AND
R/W
DECODE
FEC
GENERATOR/
CHECKER
V
DD
INTERLEAVE/
DE-INTERLEAVE
FRAME
SYNC DETECT
Tx Bits
V
SS
RXAMPOUT
Rx Input Amp
RXIN
XTAL
CLOCK
OSCILLATOR
AND
DIVIDERS
XTAL /
CLOCK
V
BIAS
Rx
Tx
SCRAMBLE/
DE-SCRAMBLE
Rx Bits
DOC1
Rx
Tx
Tx
TXOUT
Rx
Tx Output Buffer
V
BIAS
Rx LEVEL/CLOCK
EXTRACTION
DOC2
LOW PASS
FILTER
Figure 1: Block Diagram
ã
2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480226.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
GMSK Packet Data Modem
5 of 43
CMX909B Advance Information
2. Signal List
Package
E2/D5/P4
Pin No.
1
Signal
Name
IRQ
Description
Type
Output
A ‘wire-ORable’ output for connection to the host
µ
C's
Interrupt Request input. This output has a low impedance
pull down to V
SS
when active and is high impedance when
inactive.
2
3
4
5
6
7
8
9
10
D7
D6
D5
D4
D3
D2
D1
D0
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
Bi-directional
input
Read. An active low logic level input used to control the
reading of data from the modem into the host
µ
C.
Write. An active low logic level input used to control the
writing of data into the modem from the host
µ
C.
The negative supply rail (ground).
8-bit bi-directional 3-state
µ
C interface data lines.
RD
WR
V
SS
CS
A0
A1
XTAL
XTAL/CLOCK
DOC 2
DOC 1
TXOUT
V
BIAS
11
12
13
14
15
16
17
18
19
20
21
input
power
input
input
input
output
input
output
output
output
output
Chip Select. An active low logic level input to the modem,
used to enable a data read or write operation.
Two logic level modem register select inputs.
The output of the on-chip oscillator.
The input to the on-chip oscillator, for external Xtal circuit or
clock.
Connections to the Rx level measurement circuitry. A
capacitor should be connected from each pin to V
SS
.
The Tx signal output from the modem.
A bias line for the internal circuitry, held at V
DD
/2. This pin
must be decoupled to V
SS
by a capacitor mounted close to
the device pins.
The input to the Rx input amplifier.
The output of the Rx input amplifier and the input to the Rx
filter.
The positive supply rail. Levels and voltages are dependent
upon this supply. This pin should be decoupled to V
SS
by a
capacitor.
22
23
24
RXIN
RXFB
V
DD
input
output
power
Note:
To achieve good noise performance, V
DD
and V
BIAS
decoupling and protection of the receive path from
extraneous in-band signals are very important. It is recommended that the printed circuit board is laid out with
a ground plane in the CMX909B area to provide a low impedance connection between the V
SS
pin and the
V
DD
and V
BIAS
decoupling capacitors. It is also important to achieve a low impedance connection between the
Xtal capacitors (C3 and C4) and the ground plane.
ã
2001 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480226.001
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies.
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
