Datasheet> 器件分类 > 可编程逻辑器件> 可编程逻辑> A32200DXV-FRQ240C

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A32200DXV-FRQ240C: 产品描述Field Programmable Gate Array, 1230 CLBs, 20000 Gates, CMOS, PQFP240, HEAT SINK, POWER, PLASTIC, RQFP-240; 产品类别可编程逻辑器件可编程逻辑; 文件大小457KB，共82页; 制造商Actel; 官网地址http://www.actel.com/

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A32200DXV-FRQ240C概述

Field Programmable Gate Array, 1230 CLBs, 20000 Gates, CMOS, PQFP240, HEAT SINK, POWER, PLASTIC, RQFP-240

A32200DXV-FRQ240C规格参数

参数名称	属性值
是否Rohs认证	不符合
厂商名称	Actel
包装说明	HEAT SINK, POWER, PLASTIC, RQFP-240
Reach Compliance Code	compli
CLB-Max的组合延迟	5.2 ns
JESD-30 代码	S-PQFP-G240
JESD-609代码	e0
长度	32 mm
湿度敏感等级	4
可配置逻辑块数量	1230
等效关口数量	20000
端子数量	240
最高工作温度	70 °C
最低工作温度
组织	1230 CLBS, 20000 GATES
封装主体材料	PLASTIC/EPOXY
封装代码	HFQFP
封装形状	SQUARE
封装形式	FLATPACK, HEAT SINK/SLUG, FINE PITCH
峰值回流温度（摄氏度）	225
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified
座面最大高度	4.1 mm
最大供电电压	3.465 V
最小供电电压	3.135 V
标称供电电压	3.3 V
表面贴装	YES
技术	CMOS
温度等级	COMMERCIAL
端子面层	TIN LEAD
端子形式	GULL WING
端子节距	0.5 mm
端子位置	QUAD
处于峰值回流温度下的最长时间	30
宽度	32 mm

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Integrator Series FPGAs

– 1200XL and 3200DX Familes

Fe atur es

High Capacity

•

2,500 to 40,000 logic gates

Up to 4 Kbits configurable dual-port SRAM

Fast wide-decode circuitry

Up to 288 user-programmable I/O Pins

225 MHz performance

5 ns Dual-Port SRAM Access

100 MHz FIFOs

7.5 ns 35-bit Address Decode

Cadence, Escalade, Exemplar, IST, Mentor Graphics,

Synopsys and Viewlogic

• JTAG 1149.1 Boundary Scan Testing

Ge ne r al D e s c r ip t i on

High Performance

Actel’s Integrator Series FPGAs are the first programmable

logic devices optimized for high-speed system logic

integration. Based on Actel's proprietary PLICE antifuse

technology and state-of-the-art 0.6-micron double metal

CMOS process, the Integrator Series devices offer a

fine-grained, register-rich architecture with the industry’s

fastest embedded dual-port SRAM and wide decode circuitry.

3200DX and 1200XL FPGAs were designed to integrate

system logic which is typically implemented in multiple

CPLDs, PALs and FPGAs. These devices provide the features

and performance required for today’s complex, high-speed

digital logic systems. The 3200DX family offers the industry’s

fastest dual-port SRAM for implementing fast FIFOs, LIFOs

and temporary data storage. The large number of storage

elements can efficiently address applications requiring wide

datapath manipulation and transformation functions such as

telecommunications, networking and DSP.

Ease-of-Integration

• Synthesis-friendly architecture supports ASIC design

methodologies

• 95–100% device utilization using automatic Place and

Route Tools

• Deterministic, user-controllable timing via DirectTime

software tools

• Supported by Actel Designer Series development system

with interfaces to popular design environments such as

In tegr ato r Seri es Product Pro fil e

Device

Capacity

A1225XL

A1240XL

A3265DX

A1280XL

A32100DX A32140DX A32200DX A32300DX A32400DX

Logic Gates

SRAM Bits

Logic Modules

2,500

N/A

231

220

N/A

231

PL84

PQ100

VQ100

PG100

4,000

N/A

348

336

N/A

348

104

PL84

PQ100

PQ144

TQ176

PG132

6,500

N/A

510

475

510

126

PL84

PQ100

PQ160

TQ176

8,000

N/A

624

608

N/A

624

140

PL84

PQ160

PQ208

TQ176

PG176

CQ172

10,000

2,048

700

662

700

152

Yes

PL84

PQ160

PQ208

TQ176

CQ84

14,000

N/A

954

912

954

176

Yes

PL84

PQ160

PQ208

TQ176

CQ256

20,000

2,560

1,230

1,184

1,230

202

Yes

PQ208

RQ208

RQ240

CQ208

CQ256

30,000

3,072

1,888

1,833

1,888

250

Yes

RQ208

RQ240

CQ256

40,000

4,096

2,526

2,466

2,526

288

Yes

RQ240

Sequential

Combinatorial

Decode

SRAM Modules

(64x4 or 32x8)

Dedicated Flip-Flops

Clocks

User I/O

(maximum)

JTAG

Packages

Note 1:

Logic gate capacity does not include SRAM bits as logic.

S e p t e m b e r 19 9 7

1-9

A32200DXV-FRQ240C

A32200DXV-FRQ240C概述

A32200DXV-FRQ240C规格参数

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