74AUP2G14
Low-power dual Schmitt trigger inverter
Rev. 6 — 17 September 2015
Product data sheet
1. General description
The 74AUP2G14 provides two inverting buffers with Schmitt trigger action which accept
standard input signals. They are capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
T+
and the negative voltage V
T
is defined as the input
hysteresis voltage V
H
.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9
A
(maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 C
to +85
C
and
40 C
to +125
C
3. Applications
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
NXP Semiconductors
74AUP2G14
Low-power dual Schmitt trigger inverter
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
74AUP2G14GW
74AUP2G14GM
74AUP2G14GF
74AUP2G14GN
74AUP2G14GS
74AUP2G14GX
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
40 C
to +125
C
Name
SC-88
XSON6
XSON6
XSON6
XSON6
X2SON6
Description
plastic surface-mounted package; 6 leads
Version
SOT363
Type number
plastic extremely thin small outline package; no leads; SOT886
6 terminals; body 1
1.45
0.5 mm
plastic extremely thin small outline package; no leads; SOT891
6 terminals; body 1
1
0.5 mm
extremely thin small outline package; no leads;
6 terminals; body 0.9
1.0
0.35 mm
extremely thin small outline package; no leads;
6 terminals; body 1.0
1.0
0.35 mm
plastic thermal extremely thin small outline package;
no leads; 6 terminals; body 1
0.8
0.35 mm
SOT1115
SOT1202
SOT1255
5. Marking
Table 2.
Marking
Marking code
[1]
pK
pK
pK
pK
pK
pK
Type number
74AUP2G14GW
74AUP2G14GM
74AUP2G14GF
74AUP2G14GN
74AUP2G14GS
74AUP2G14GX
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
74AUP2G14
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 17 September 2015
2 of 23
NXP Semiconductors
74AUP2G14
Low-power dual Schmitt trigger inverter
7. Pinning information
7.1 Pinning
Fig 4.
Pin configuration SOT363
Fig 5.
Pin configuration SOT886
Fig 6.
Pin configuration SOT891, SOT1115 and
SOT1202
Fig 7.
Pin configuration SOT1255 (X2SON6)
7.2 Pin description
Table 3.
Symbol
1A
GND
2A
2Y
V
CC
1Y
Pin description
Pin
1
2
3
4
5
6
Description
data input
ground (0 V)
data input
data output
supply voltage
data output
74AUP2G14
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 17 September 2015
3 of 23
NXP Semiconductors
74AUP2G14
Low-power dual Schmitt trigger inverter
8. Functional description
Table 4.
Input
nA
L
H
[1]
H = HIGH voltage level; L = LOW voltage level.
Function table
[1]
Output
nY
H
L
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
0.5
50
0.5
50
[1]
Max
+4.6
-
+4.6
-
+4.6
20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
0.5
-
-
50
65
T
amb
=
40 C
to +125
C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SC-88 packages: above 87.5
C
the value of P
tot
derates linearly with 4.0 mW/K.
For X2SON6 and XSON6 packages: above 118
C
the value of P
tot
derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
Symbol
V
CC
V
I
V
O
T
amb
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
ambient temperature
Active mode
Power-down mode; V
CC
= 0 V
Conditions
Min
0.8
0
0
0
40
Max
3.6
3.6
V
CC
3.6
+125
Unit
V
V
V
V
C
74AUP2G14
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 17 September 2015
4 of 23
NXP Semiconductors
74AUP2G14
Low-power dual Schmitt trigger inverter
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
T
amb
= 25
C
V
OH
HIGH-level output voltage
V
I
= V
T+
or V
T
I
O
=
20 A;
V
CC
= 0.8 V to 3.6 V
I
O
=
1.1
mA; V
CC
= 1.1 V
I
O
=
1.7
mA; V
CC
= 1.4 V
I
O
=
1.9
mA; V
CC
= 1.65 V
I
O
=
2.3
mA; V
CC
= 2.3 V
I
O
=
3.1
mA; V
CC
= 2.3 V
I
O
=
2.7
mA; V
CC
= 3.0 V
I
O
=
4.0
mA; V
CC
= 3.0 V
V
OL
LOW-level output voltage
V
I
= V
T+
or V
T
I
O
= 20
A;
V
CC
= 0.8 V to 3.6 V
I
O
= 1.1 mA; V
CC
= 1.1 V
I
O
= 1.7 mA; V
CC
= 1.4 V
I
O
= 1.9 mA; V
CC
= 1.65 V
I
O
= 2.3 mA; V
CC
= 2.3 V
I
O
= 3.1 mA; V
CC
= 2.3 V
I
O
= 2.7 mA; V
CC
= 3.0 V
I
O
= 4.0 mA; V
CC
= 3.0 V
I
I
I
OFF
I
OFF
I
CC
I
CC
C
I
C
O
V
OH
input leakage current
power-off leakage current
V
I
= GND to 3.6 V; V
CC
= 0 V to 3.6 V
V
I
or V
O
= 0 V to 3.6 V; V
CC
= 0 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.1
1.7
0.1
0.31
0.31
0.31
0.44
0.31
0.44
0.1
0.2
0.2
0.5
40
-
-
V
V
V
V
V
V
V
A
A
A
A
A
pF
pF
0.3
V
CC
V
V
CC
0.1
0.75
V
CC
1.11
1.32
2.05
1.9
2.72
2.6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
Conditions
Min
Typ
Max
Unit
additional power-off leakage V
I
or V
O
= 0 V to 3.6 V;
current
V
CC
= 0 V to 0.2 V
supply current
additional supply current
input capacitance
output capacitance
HIGH-level output voltage
V
I
= GND or V
CC
; I
O
= 0 A;
V
CC
= 0.8 V to 3.6 V
V
I
= V
CC
0.6 V; I
O
= 0 A;
V
CC
= 3.3 V
V
I
= GND or V
CC
; V
CC
= 0 V to 3.6 V
V
O
= GND; V
CC
= 0 V
V
I
= V
T+
or V
T
I
O
=
20 A;
V
CC
= 0.8 V to 3.6 V
I
O
=
1.1
mA; V
CC
= 1.1 V
I
O
=
1.7
mA; V
CC
= 1.4 V
I
O
=
1.9
mA; V
CC
= 1.65 V
I
O
=
2.3
mA; V
CC
= 2.3 V
I
O
=
3.1
mA; V
CC
= 2.3 V
I
O
=
2.7
mA; V
CC
= 3.0 V
I
O
=
4.0
mA; V
CC
= 3.0 V
T
amb
=
40 C
to +85
C
V
CC
0.1
0.7
V
CC
1.03
1.30
1.97
1.85
2.67
2.55
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
74AUP2G14
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 6 — 17 September 2015
5 of 23
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