10-BIT, TWO PORT
BUS SWITCH
Integrated Device Technology, Inc.
IDT74FST3861
PRODUCT PREVIEW
FEATURES:
• Bus switches provide zero delay paths
• Extended commercial range of –40°C to +85°C
• Low switch on-resistance:
FST3xxx –5Ω
FST32xxx –28Ω
• TTL-compatible input and output levels
• ESD >2000v per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in SOIC, QSOP and TSSOP
DESCRIPTION:
The FST3861 belongs to IDT’s family of Bus switches. Bus
switch devices perform the function of connecting or isolating
two ports without providing any inherent current sink or source
capability. They generate little or no noise of their own while
providing a low resistance path for an external driver. These
devices connect input and output ports through an n-channel
FET. When the gate-to source junction of this FET is ad-
equately forward-biased, the device conducts and the resis-
tance between input and output ports is small. Without ad-
equate bias on the gate-to-source junction of the FET, the
FET is turned off, therefore with no V
CC
applied, the device
has not insertion capability.
The low on-resistance and simplicity of the connection be-
tween input and output ports reduces the delay in this path to
close to zero.
FUNCTIONAL BLOCK DIAGRAM
OE
PIN DESCRIPTION
Pin Names
OE
A
X
B
X
Description
Output Enable Input (Active LOW)
A Port Bits
B Port Bits
4246 tbl 01
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
B
0
B
1
B
2
NC
1
2
3
4
5
6
7
8
9
10
11
12
SO24-2
SO24-8
SO24-9
PIN CONFIGURATION
24
23
22
21
20
19
18
17
16
15
14
13
V
C C
OE
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
4246 drw 02
B
3
B
4
B
5
B
6
B
7
B
8
B
9
4246 drw 01
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
GND
SOIC/QSOP/TSSOP
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1998
Integrated Device Technology, Inc.
JANUARY 1998
1
DSC-4246/-
IDT74FST3861
10-BIT, TWO PORT BUS SWITCH
COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max.
–0.5 to +7.0
–65 to +150
128
Unit
V
°C
mA
V
TERM(2)
Terminal Voltage with Respect
to GND
T
STG
Storage Temperature
I
OUT
Maximum Continuous Channel
Current
FUNCTION TABLE
Inputs
OE
L
H
Outputs
Connect A to B
Disconnect A from B
4246 tbl 03
CAPACITANCE
(1)
Symbol
C
IN
C
I/O
Parameter
Control Input Capacitance
Switch Input/Output
Capacitance
Switch Off
8
13
4246 tbl 02
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
, Control and Switch terminals
Conditions
(2)
Typ. Unit
pF
pF
4246 tbl 04
NOTES:
1. Capacitance is characterized but not tested.
2. T
A
= 25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
I
CC
Parameter
Control Input HIGH Voltage
Control Input LOW Voltage
Control Input HIGH Current
Control Input LOW Current
Current During
Bus Switch DISCONNECT
Clamp Diode Voltage
Switch Power Off Leakage
Quiescent Power Supply Current
V
CC
= Min., I
IN
= –18mA
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= Max., V
IN
= GND or V
CC
Test Conditions
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= GND
V
CC
= Max., V
O
= 0 to 5V
Min.
2.0
—
—
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
–0.7
—
0.1
Max.
—
0.8
±1
±1
±1
±1
–1.2
±1
3
V
µA
µA
4246 tbl 05
Unit
V
V
µA
µA
BUS SWITCH IMPEDANCE OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
R
ON
Parameter
Switch On Resistance
(2)
Test Conditions
V
CC
= Min., V
IN
= 0.0V
I
ON
= 48mA
V
CC
= Min., V
IN
= 2.4V
I
ON
= 15mA
I
OS
Short Circuit Current, A to B
(3)
A(B) = 0V, B(A) = V
CC
100
—
—
mA
4246 tbl 06
Min.
—
—
Typ.
(1)
5
10
Max.
7
15
Unit
Ω
NOTES:
1. Typical values are at V
CC
= 5.0V, +25°C ambient.
2. The voltage drop between the indicated ports divided by the current through the switch.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
2
IDT74FST3861
10-BIT, TWO PORT BUS SWITCH
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4,5)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
1 Enable Pin Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
1 Enable Pin Toggling
fi = 10MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
0.3
Max.
1.5
0.4
Unit
mA
mA/
MHz/
Enable
mA
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
3.0
4.0
—
3.3
4.8
4246 tbl 07
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
T
A
= –40°C to +85°C
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND. Switch inputs do not contribute to
∆I
CC.
4. This parameter represents the current required to switch the internal capacitance of the control inputs at the specified frequency.
Switch inputs generate no significant power supply currents as they transition. This parameter is not directly testable,
but is derived for use in Total Power Supply Calculations.
5. C
PD
= I
CCD
/V
CC
C
PD
= Power Dissipation Capacitance
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
i
N)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
i
= Control Input Frequency
N = Number of Control Inputs Toggling at f
i
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Condition Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
|Q
CI
|
Description
(1)
Data Propagation Delay
A to B, B to A
(2)
Switch CONNECT Delay
OE to A or B
Switch DISCONNECT Delay
OE to A or B
Charge Injection During Switch
DISCONNECT OE to A or B
(3)
Min.
—
1.5
1.5
—
Typ.
—
—
—
1.5
Max.
0.25
6.5
5.5
—
Unit
ns
ns
ns
pC
4246 tbl 08
NOTES:
1. See test circuits and waveforms.
2. The bus switch contributes no Propagation Delay other than the RC Delay of the
load interacting with the RC of the switch.
3. |Q
CI
| Is the charge injection for a single switch DISCONNECT and applies to either single switches or multiplexers.
|Q
DCI
| Is the charge injection for a multiplexer as the multiplexed port switches from one path to another. Charge injection is
reduced because the injection from the DISCONNECT of the first path is compensated by the CONNECT of the second path.
3
IDT74FST3861
10-BIT, TWO PORT BUS SWITCH
COMMERCIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
7.0V
50 0
Ω
Pulse
Generator
V
IN
D.U.T .
50pF
R
T
50 0
Ω
C
L
4246 drw 03
PROPAGATION DELAY
S A ME P H A S E
IN P UT TRA NS ITION
t
PLH
OU TP UT
t
PLH
OP P OS ITE PH A S E
IN P UT TRA NS ITION
t
PHL
t
PHL
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
4246 drw 06
V
OUT
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
Switch
Closed
SET-UP, HOLD AND RELEASE TIMES
DA TA
INP U T
TIMIN G
INP U T
t
REM
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
4246 drw 07
t
SU
t
H
4246 lnk 09
DEFINITIONS:
A S Y NCH RO NO U S
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
CON TR OL
Generator
CHARGE INJECTION
V
CC
SY NCHR ONOU S
CONTR OL
t
SU
t
H
1MHz
S ignal
Generator
E nable/Select
S witch In
(1)
Sw itch Out
D .U .T.
V
OUT
(3)
ENABLE AND DISABLE TIMES
E N AB LE
CON TR OL
INP U T
t
PZL
t
PLZ
3.5V
1.5V
t
PHZ
1.5V
0V
0.3V V
OH
0V
4246 drw 08
S w itch In (Mux)
(2)
C
L
=
50pF
D IS A BLE
3V
1.5V
0V
3.5V
NOTES:
1. Select is used with multiplexers for measuring |Q
DCI
| during multiplexer
select. During all other tests Enable is used.
2. Used with multiplexers to measure |Q
DCI
| only.
3. Charge Injection =
∆V
OUT
C
L
, with Enable toggling for |Q
CI
| or Select
toggling for |Q
DCI
|.
∆V
OUT
is the change in V
OUT
and is measured with
a 10MΩ probe.
4246 drw 04
PULSE WIDTH
LOW -HIGH-LOW
PULSE
t
W
HIGH -LOW -HIGH
P U LS E
1.5V
4246 drw 05
OUTP UT
SW ITCH
NORMA LLY
CLOSED
LOW
t
PZH
OUTP UT
SW ITCH
NORMA LLY
OPEN
H IGH
0.3V
V
O
L
1.5V
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable HIGH
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; t
F
≤
2.5ns; t
R
≤
2.5ns
4
IDT74FST3861
10-BIT, TWO PORT BUS SWITCH
COMMERCIAL TEMPERATURE RANGE
ORDERING INFORMATION
ID T
XX
Temp. Ran ge
FST
XXXX
Device Type
X
Package
SO
Q
PG
3861
Small Outline IC (S O24-2)
Quarter-size Small Outline Package (SO24-8)
Thin Shrink Small Outline P ackage (SO24-9)
10-Bit Flow Through S witch
74
–40°C to +8 5°C
4246 drw 09
5
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