IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
16-BIT REGISTERED
TRANSCEIVER
FEATURES:
•
•
•
•
•
•
•
•
•
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IDT74FCT162952AT/CT/ET
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK(o)
(Output Skew) < 250ps
Low input and output leakage
≤
1µA (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Balanced Output Drivers (±24mA)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at V
CC
= 5V,
T
A
= 25°C
Power off disable outputs permit “live insertion”
Available in SSOP and TSSOP packages
DESCRIPTION:
The FCT162952T 16-bit registered transceiver is built using advanced dual
metal CMOS technology. These high-speed, low-power devices are organized
as two independent 8-bit D-type registered transceivers with separate input and
output control for independent control of data flow in either direction. For example,
the A-to-B Enable (xCEAB) must be low to enter data from the A port. xCLKAB
controls the clocking function. When xCLKAB toggles from low-to-high the data
present on the A port will be clocked into the register. xOEAB performs the output
enable function on the B port. Data flow from the B port to A port is similar but
requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is
achieved by tying the control pins of the independent transceivers together.
The FCT162952T have balanced output drive with current limiting resistors.
This offers low ground bounce, minimal undershoot, and controlled output fall
times–reducing the need for external series terminating resistors. The
FCT162952T is a plug-in replacement for the FCT16952T and ABT16952 for
on-board bus interface applications.
FUNCTIONAL BLOCK DIAGRAM
54
31
1
CEBA
55
2
CEBA
30
1
CLKBA
1
2
CLKBA
28
1
OEAB
3
2
OEAB
26
1
CEAB
2
2
CEAB
27
1
CLKAB
56
2
CLKAB
29
1
OEBA
5
2
OEBA
C
CE
D
15
52
1
A
1
2
A
1
1
B
1
C
CE
D
42
2
B
1
C
CE
D
C
CE
D
TO SEVE N OTHER CHANN ELS
TO SEVEN OTHE R CH ANN ELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2002 Integrated Device Technology, Inc.
MAY 2002
DSC-5443/3
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1
OEAB
1
CLKAB
1
CEAB
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max
–0.5 to 7
–0.5 to V
CC
+0.5
–65 to +150
–60 to +120
Unit
V
V
°C
mA
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OEBA
1
CLKBA
1
CEBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
TERM
(2)
Terminal Voltage with Respect to GND
V
TERM
(3)
Terminal Voltage with Respect to GND
T
STG
I
OUT
Storage Temperature
DC Output Current
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Output and I/O terminals for FCT162XXX.
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max.
6
8
Unit
pF
pF
NOTE:
1. This parameter is measured at characterization but not tested.
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
FUNCTION TABLE
(1, 3)
xCEAB
H
X
L
L
X
Inputs
xCLKAB
xOEAB
X
L
L
L
↑
L
↑
L
X
H
xAx
X
X
L
H
X
Outputs
xBx
B
(2)
B
(2)
L
H
Z
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
GND
2
CEAB
2
CLKAB
2
OEAB
GND
2
CEBA
2
CLKBA
2
OEBA
SSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
xOEAB
xOEBA
xCEAB
xCEBA
xCLKAB
xCLKBA
xAx
xBx
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Clock Enable Input (Active LOW)
B-to-A Clock Enable Input (Active LOW)
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
NOTE:
1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA,
and xOEBA.
2. Level of B before the indicated steady-state input conditions were established.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= LOW-to-HIGH Transition
Z = High-Impedance
2
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: T
A
= –40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current (Input pins)
(4)
Input HIGH Current (I/O pins)
(4)
Input LOW Current (Input pins)
(4)
Input LOW Current (I/O pins)
(4)
High Impedance Output Current
(3-State Output pins)
(4)
Clamp Diode Voltage
Short Circuit Current
Input Hysteresis
Quiescent Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
=
GND
(3)
—
V
CC
= Max.
V
O
= 2.7V
V
O
= 0.5V
V
I
= GND
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
Min.
2
—
—
—
—
—
—
—
—
–80
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
–0.7
–140
100
5
Max.
—
0.8
±1
±1
±1
±1
±1
±1
–1.2
–250
—
500
V
mA
mV
µA
µA
Unit
V
V
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
I
ODL
I
ODH
V
OH
V
OL
Parameter
Output LOW Current
Output HIGH Current
Output HIGH Voltage
Output LOW Voltage
Test Conditions
(1)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= 5V, V
IN
= V
IH
or V
IL
, V
O
= 1.5V
(3)
V
CC
= Min.
I
OH
= –24mA
V
IN
= V
IH
or V
IL
V
CC
= Min.
I
OL
= 24mA
V
IN
= V
IH
or V
IL
Min.
60
–60
2.4
—
Typ.
(2)
115
–115
3.3
0.3
Max.
200
–200
—
0.55
Unit
mA
mA
V
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This test limit for this parameter is ±5µA at T
A
= –55°C.
3
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply
Current TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
xOEAB or xOEBA = GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz (xCLKAB)
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = V
CC
One Bit Toggling
f
i
= 5MHz
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz (xCLKAB)
50% Duty Cycle
xOEAB = xCEAB = GND
xOEBA = V
CC
Sixteen Bits Toggling
f
i
= 2.5MHz
50% Duty Cycle
Min.
—
V
IN
= V
CC
V
IN
= GND
—
Typ.
(2)
0.5
75
Max.
1.5
120
Unit
mA
µA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
—
0.8
1.7
mA
V
IN
= 3.4V
V
IN
= GND
—
1.3
3.2
V
IN
= V
CC
V
IN
= GND
—
3.8
6.5
(5)
V
IN
= 3.4V
V
IN
= GND
—
8.3
20
(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
N
CP
/2 + fiNi)
I
CC
= Quiescent Current (I
CCL
, I
CCH
and I
CCZ
)
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
N
CP
= Number of Clock Inputs at f
CP
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
4
IDT74FCT162952AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT162952AT
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
SU
t
H
t
W
t
SK(o)
Parameter
Propagation Delay
xCLKAB, xCLKBA to xBx, xAx
Output Enable Time
xOEBA, xOEAB to xAx, xBx
Output Disable Time
xOEBA, xOEAB to xAx, xBx
Set-up Time, HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xAx, xBx to xCLKAB, xCLKBA
Set-up Time, HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Hold Time HIGH or LOW
xCEAB, xCEBA to xCLKAB, xCLKBA
Pulse Width HIGH or LOW
xCLKAB or xCLKBA
(3)
Output Skew
(4)
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
Min.
(2)
2
1.5
1.5
2.5
2
3
2
3
—
Max.
10
10.5
10
—
—
—
—
—
0.5
FCT162952CT
Min.
(2)
2
1.5
1.5
2.5
1.5
3
2
3
—
Max.
6.3
7
6.5
—
—
—
—
—
0.5
FCT162952ET
Min.
(2)
1.5
1.5
1.5
1.5
0
2
0
3
—
Max.
3.7
4.4
3.6
—
—
—
—
—
0.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Guaranteed but not tested
4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
5
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