The documentation and process conversion measures
necessary to comply with this document shall be
completed by 30 June 2013.
INCH-POUND
MIL-PRF-19500/376K
30 March 2013
SUPERSEDING
MIL-PRF-19500/376J
20
November 2010
PERFORMANCE SPECIFICATION SHEET
* SEMICONDUCTOR DEVICE, TRANSISTOR, NPN, SILICON, LOW-POWER,
TYPES 2N2484, 2N2484UA, 2N2484UB, 2N2484UBC, 2N2484UBN, 2N2484UBCN JAN, JANTX, JANTXV,
JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH JANHCA, JANHCB, JANKCA,
JANKCB, JANKCM, JANKCD, JANKCP, JANKCL, JANKCR, JANKCF, JANKCG, AND JANKCH
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for NPN, silicon, low-power transistors. Four
levels of product assurance are provided for each device type as specified in MIL-PRF-19500. Two levels of product
assurance are provided for die. RHA level designators “M”, “D”, “P“, “L”, “R”, “F’, “G” and “H” are appended to the
device prefix to identify devices, which have passed RHA requirements.
* 1.2 Physical dimensions. See
figure 1
(similar to TO-18), figure 2, (surface mount case outlines UA), figure 3,
(surface mount case outlines UB, UBC, UBN, and UBCN), and figures 4 and 5 (die).
*
1.3 Maximum ratings. Unless otherwise specified T
A
= +25C.
Types
P
T
(1)
T
A
= +25C
mW
2N2484
2N2484UA
2N2484UB, UBN
2N2484UBC, UBCN
360
360
360
360
V dc
60
60
60
60
V dc
6
6
6
6
V dc
60
60
60
60
mA dc
50
50
50
50
C
-65 to +200
-65 to +200
-65 to +200
-65 to +200
C/W
325
275
350
350
C/W
N/A
110
100
100
V
CBO
V
EBO
V
CEO
I
C
T
J
and T
STG
R
JA
(2)
R
JSP
(2)
(1) For derating see figures 6, 7, and 8.
(2) For thermal impedance see figures 9, 10, 11, 12, and 13.
Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime, ATTN:
VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dla.mil.
Since contact
information can change, you may want to verify the currency of this address information using the ASSIST Online
database at
https://assist.dla.mil.
AMSC N/A
FSC 5961
MIL-PRF-19500/376K
1.4 Primary electrical characteristics. Unless otherwise specified, T
A
= +25C.
h
fe
Limits
V
CE
= 5 V dc
I
C
= 1 mA dc
f = 1 kHz
C
obo
I
E
= 0
V
CB
= 5 V dc
100 kHz
f
1 MHz
pF
Min
Max
250
900
5.0
2.0
7.0
|h
fe
|2
I
C
= 500
A
dc
V
CE
= 5 V dc
f = 30 MHz
V
CE(sat)
(1)
I
C
= 1.0 mA dc
I
B
= 0.1 mA dc
V dc
0.3
Limits
NF
I
C
= 10
A
dc, V
CE
= 5 V dc
R
g
= 10 k
f = 100 Hz
f = 1000 Hz
f = 10 kHz
dB
dB
3
dB
2
h
FE2
h
FE5
V
CE
= 5 V dc
I
C
= 10
A
dc
200
500
V
CE
= 5 V dc
I
C
= 1 mA dc
250
800
Min
Max
7.5
(1) Pulsed (see
4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
-
Semiconductor Devices, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750
-
Test Methods for Semiconductor Devices.
(Copies of these documents are available online at
https://assist.dla.mil/quicksearch
or
https://assist.dla.mil
or
from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/376K
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.178
.195
4.52
4.95
.170
.210
4.32
5.33
.209
.230
5.31
5.84
.100 TP
2.54 TP
.016
.021
0.41
0.53
.500
.750
12.70
19.05
.016
.019
0.41
0.48
.050
1.27
.250
6.35
.100
2.54
.040
1.02
.028
.048
0.71
1.22
.036
.046
0.91
1.17
.010
0.25
45 TP
45 TP
Symbol
CD
CH
HD
LC
LD
LL
LU
L
1
L
2
P
Q
TL
TW
r
Note
6
7,8
7,8
7,8
7,8
7,8
5
3,4
3
10
6
NOTES:
1. Dimension are in inches.
2. Millimeters are given for general information only.
3. Beyond r (radius) maximum, TW shall be held for a minimum length of .011 inch (0.28 mm).
4. Dimension TL measured from maximum HD.
5. Body contour optional within zone defined by HD, CD, and Q.
6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall
be within .007 inch (0.18 mm) radius of true position (TP) at maximum material condition
(MMC) relative to tab at MMC.
7. Dimension LU applies between L
1
and L
2
. Dimension LD applies between L
2
and LL
minimum. Diameter is uncontrolled in L
1
and beyond LL minimum.
8. All three leads.
9. The collector shall be internally connected to the case.
10. Dimension r (radius) applies to both inside corners of tab.
11. In accordance with ASME Y14.5M, diameters are equivalent to
x
symbology.
12. Lead 1 = emitter, lead 2 = base, lead 3 = collector.
FIGURE 1. Physical dimensions (similar to TO-18).
3
MIL-PRF-19500/376K
UA
Symbol
BL
BL2
BW
BW2
CH
L3
LH
LL1
LL2
LS
LW
LW2
Pin no.
Transistor
Dimensions
Inches
Millimeters
Min
Max
Min
Max
.215
.225
5.46
5.71
.225
5.71
.145
.155
3.68
3.94
.155
3.94
.061
.075
1.55
1.91
.003
0.08
.029
.042
0.74
1.07
.032
.048
0.81
1.22
.072
.088
1.83
2.24
.045
.055
1.14
1.39
.022
.028
0.56
0.71
.006
.022
0.15
0.56
1
Collector
2
Emitter
3
Base
Note
3
5
5
4
N/C
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Dimension CH controls the overall package thickness. When a window lid is used, dimension CH must increase
by a minimum of .010 inch (0.254 mm) and a maximum of .040 inch (1.020 mm).
4. The corner shape (square, notch, radius) may vary at the manufacturer's option, from that shown on the
drawing.
* 5. Dimensions LW2 minimum and L3 minimum and the appropriate castellation length define an unobstructed
three-dimensional space traversing all of the ceramic layers in which a castellation was designed.
(Castellations are required on the bottom two layers, optional on the top ceramic layer.) Dimension LW2
maximum define the maximum width and depth of the castellation at any point on its surface. Measurement of
these dimensions may be made prior to solder dipping.
6. The co-planarity deviation of all terminal contact points, as defined by the device seating plane, shall not exceed
.006 inch (0.15 mm) for solder dipped leadless chip carriers.
7. In accordance with ASME Y14.5M, diameters are equivalent to
x
symbology.
* FIGURE 2. Physical dimensions, surface mount (2N2484UA).
4
MIL-PRF-19500/376K
* FIGURE 3. Physical dimensions, surface mount (2N2484UB, UBC, UBN, and UBCN)
5
stm32/stm8
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