S-Type
Voltage Controlled Crystal Oscillator
Features
•
Output Frequencies to 65.536MHz
•
5 or 3.3 Vdc operation
•
Tri-State Output
•
Low jitter < 6pS rms (for freq >12MHz)
•
VCXO with CMOS outputs
•
0/70 or –40/85
°C
temperature range
•
Hermetically sealed ceramic SMD package
The S-Type Voltage Controlled Crystal
Oscillator
Output
Buffer /
Tri State
Product is free of lead and compliant to EC RoHS
Directive
Applications
•
SONET/SDH
•
xDSL
•
Digital Video
ESD Diodes
•
Low jitter PLL’s
Vc
Input
Buffer
Block Diagram
f
O
Description
The VI S-Type Voltage Controlled Crystal
Oscillator (VCXO) is a quartz stabilized square
wave generator with a CMOS output and is
tested at CMOS (3.3 and 5V operation) and TTL
(5 V operation) logic levels. Devices are tested
for absolute pull range (APR) and start-up over
the operating temperature range which insures
the performance and reliability.
Figure 1
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel:1-88-VECTRON-1
e-mail: vectron@vectron.com
S-Type Voltage Controlled Crystal Oscillator
Performance Characteristics
Table 1. Electrical Performance
Parameter
Supply Voltage
1
(+5 or +3.3 V)
Supply Current
Output Logic Levels
Output Logic High
2
Output Logic Low
2
Transition Times
Rise Time
2
Fall Time
2
Symmetry or Duty Cycle
3
Nominal Output Frequency Options
Test Conditions for APR (+5V option)
Test Conditions for APR (+3.3V option)
Absolute Pull Range (ordering
option)
Gain Transfer
Operating temperature (ordering
option)
Control Voltage Leakage Current
Control Voltage Bandwidth (-3dB)
Symbo
l
V
DD
I
DD
V
OH
V
OL
t
R
t
F
SYM
f
O
V
C
V
C
APR
Min
Typical
Maximum
Units
V
mA
V
V
ns
ns
%
MHz
V
V
ppm
°C
uA
KHz
0.9*V
DD
1.1*V
DD
10mA +0.25mA/MHz
0.8*V
DD
0.1V
DD
5
5
45/55
65.536
4.5
3.0
50,80 or 100
Positive
0/70 or –40/85
±1
10
1.024
0.5
0.3
I
VCXO
BW
1. A 0.01uF capacitor should be located as close to the supply as possible (to ground) and a 0.1uF is also recommended.
2. Figure 1 defines these parameters. Figure 2 illustrates the equivalent five gate TTL load and operating conditions under which
these parameters are tested and specified.
3. Symmetry is defined as (ON TIME/PERIOD with Vs=-1.4 V for TTL and Vs=2.5 V for CMOS, 5 volt operation, and Vs=1.65V for
3.3 Volt operation. TTL/CMOS pin should be grounded for frequencies <12MHz.
T
R
80
%
T
F
I
DD
6
V
DD
+
-
2
5
3
650Ω
50%
20
%
On Time
Period
.
1µF
.01µF
I
C
V
C
1
+
-
4
15pF
1.8k
Figure 2. Output Waveform
Figure 3. Output Test Conditions (25±5°C)
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional
operation is not implied at these or any other conditions in excess of conditions represented in the
operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may
adversely affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Symbol
Power Supply
V
DD
Storage Temperature
Tstorage
Voltage Control Range
V
C
Ratings
7
-55/125
0 to V
DD
Unit
Vdc
°C
V
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel:1-88-VECTRON-1
e-mail: vectron@vectron.com
S-Type Voltage Controlled Crystal Oscillator
Qualification Conformance
The S-Type has undergone the following Mil-Std qualification.
Table 3. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Solderability
Gross and Fine Leak
Resistance to Solvents
Conditions
MIL-STD-883C 2002.3, TEST B
MIL-STD-883C 2007.1, TEST C
MIL-STD-883C 2003.5
MIL-STD-883C 1014.7, 100% Tested
MIL-STD-883C 2016
Handling Precautions
Although ESD protection circuitrry has been designed into the the S-Type, proper precautions should be
taken when handling and mounting. VI employs a human body model and a charged-device model (CDM)
for ESD susceptibility testing and design protection evaluation. ESD thresholds are dependent on the
circuit parameters used to define the model. Although no industry wide standard has been adopted for the
CDM, a standard HBM of resistance=1.5Kohms and capacitance = 100pF is widely used and Therefore
can be used for comparison purposes.
Table 4. ESD Ratings
Model
Human Body Model
Charged Device Model
Minimum
1500 V (Mil-STD-883D, Method 3015, Class 1)
1500 V
Absolute Pull Range (APR) Specification
The frequency deviation of the S-Type VCXO is specified in terms of Absolute Pull Range (APR). APR
provides the user with a guaranteed specification for minimum available frequency deviation over all
operating conditions. Operating conditions include operating temperature range, power supply variation,
differences in output loading and changes due to aging.
An S-Type VCXO with an APR of +/-50 ppm will track a +/-50 ppm reference source over all
operating conditions. The same device will typically demonstrate a Total Pull capability of 150 to
350 ppm.
Absolute Pull Range (APR) is specified by the fourth character of the product code in Table 6.
Please see Vectron’s web site,
www.vectron.com,
for the APR Application Note.
Oscillator Aging
Quartz stabilized oscillators typically exhibit a small shift in output frequency during aging. The major
factors which lead to this shift are changes in the mechanical stress on the crystal and mass-loading of
foreign material on the crystal.
As the oscillator ages, relaxation of the crystal mounting stress or transfer of environmental stress
through the package to the crystal mounting arrangement can lead to frequency variations. VI has
minimized these two effects through the use of a miniature AT-Cut strip resonator crystal which allows a
superior mounting arrangement and results in minimal relaxation and almost negligible environmental
stress transfer.
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel:1-88-VECTRON-1
e-mail: vectron@vectron.com
S-Type Voltage Controlled Crystal Oscillator
Oscillator Aging
Mass-loading on the crystal generally results in a frequency decrease and is typically due to out-gassing
of material within a hermetic package or from contamination by external material in a less than hermetic
package. VI has minimized the impact of mass loading by ensuring hermetic integrity and minimizing out-
gassing by limiting the number of internal components through the use of ASIC technology.
Under normal operating conditions with an operating temperature of 40°C, the S-Type will typically exhibit
2 ppm aging in the first year of operation. The device will then typically exhibit 1 ppm aging the following
year with a logarithmic decline each year thereafter.
t
L
260
R
UP
t
P
R
DN
Temperature (DegC)
217
200
150
t
S
t
AMB-P
25
Time (sec)
Figure 4. Suggested IR profile
Figure 5. Tape and Reel
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel:1-88-VECTRON-1
e-mail: vectron@vectron.com
S-Type Voltage Controlled Crystal Oscillator
Figure 6. Outline Diagram
Vectron International 267 Lowell Rd, Hudson NH 03051
Tel:1-88-VECTRON-1
e-mail: vectron@vectron.com
FPGA/CPLD
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