REVISIONS
LTR
A
B
C
D
E
DESCRIPTION
Sheet 4: TABLE I. Short circuit current test. Under the min limits column,
delete “-12 mA” and substitute “-10 mA”.
Changes in accordance with N.O.R. 5962-R343-97.
Add CAGE U3158 and update to reflect current requirements. - ro
Add case outline 2. Make changes to 1.2.2, 1.3, figure 1, and figure 2. - ro
Add case outline F. Make changes to 1.2.2, 1.3, and figure 1. - ro
Update paragraphs to current MIL-PRF-38535 requirements. - ro
DATE (YR-MO-DA)
97-06-23
02-09-25
05-08-15
07-02-05
13-02-19
APPROVED
R. MONNIN
R. MONNIN
R. MONNIN
J. RODENBECK
C. SAFFLE
THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
PREPARED BY
MARCIA B. KELLEHER
E
1
E
2
E
3
E
4
E
5
E
6
E
7
E
8
E
9
E
10
E
11
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
CHECKED BY
D. A. DiCENZO
APPROVED BY
MICHAEL A. FRYE
DRAWING APPROVAL DATE
88-05-09
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
MICROCIRCUIT, LINEAR, POWER SUPPLY
SUPERVISORY CIRCUIT, MONOLITHIC SILICON
AMSC N/A
REVISION LEVEL
E
SIZE
A
CAGE CODE
67268
SHEET
1 OF 11
5962-87740
DSCC FORM 2233
APR 97
5962-E242-13
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-87740
01
E
A
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
Generic number
1543
1544
Circuit function
Power supply output supervisory circuit
Power supply output supervisory circuit
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
E
F
V
2
Descriptive designator
GDIP1-T16 or CDIP2-T16
GDFP2-F16 or CDFP3-F16
GDIP1-T18 or CDIP2-T18
CQCC1-N20
Terminals
16
16
18
20
Package style
Dual-in-line
Flat pack
Dual-in-line
Square leadless chip carrier
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Input supply voltage (V
IN
) ............................................................................................. 40 V dc
Sense inputs .................................................................................................................
SCR trigger current .......................................................................................................
Indicator output voltage ................................................................................................
Indicator output sink current .........................................................................................
Power dissipation (P
D
) .................................................................................................
Junction temperature (T
J
) .............................................................................................
Storage temperature range ...........................................................................................
Lead temperature (soldering, 10 seconds) ...................................................................
Thermal resistance, junction-to-case (
θ
JC
):
Cases E, F, V, and 2 .................................................................................................
1.4 Recommended operating conditions.
Ambient operating temperature range (T
A
) ................................................................... -55°C to +125°C
_____
1/ At higher input voltages, a dissipation limiting resistor (R
G
) is required: R
G
>
(V
IN
– 5 V) / 0.2 A.
2/ Derate linearly above T
A
= +25°C at 8.0 mW/°C.
3/ Must withstand the added P
D
due to short circuit test; e.g., I
OS
.
V
IN
-600 mA 1/
40 V dc
50 mA
1000 mW 2/ 3/
+150°C
-65°C to +150°C
+300°C
See MIL-STD-1835
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-87740
SHEET
E
2
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
https://assist.dla.mil/quicksearch/
or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to
MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and
qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management
(QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the
device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with
MIL-PRF-38535 is required to identify when the QML flow option is used.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Functional diagrams. The functional diagrams shall be as specified on figure 2.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-87740
SHEET
E
3
TABLE I. Electrical performance characteristics.
Conditions
-55°C
≤
T
A
≤
+125°C
V
IN
= 10 V
unless otherwise specified
Total device
Input voltage range
V
INR
1,2
3
Supply current
I
S
V
IN
= 40 V
1
2,3
Reference section ( V
REF
and V
IN
pins )
Output voltage
V
O
1
2,3
Line regulation
Load regulation
Short circuit current
V
LINE
V
LOAD
I
OS
V
IN
= 5.0 V to 30 V
I
REF
= 0 mA to -10 mA
V
REF
= 0 V
1,2,3
1,2,3
1,2,3
All
All
All
-10
All
2.48
2.45
2.52
2.55
5.0
10
-40
mV
mV
mA
V
All
All
4.5
4.7
40
40
10
15
mA
V
Test
Symbol
Group A
subgroups
Device
type
Min
Limits
Unit
Max
SCR TRIGGER section ( SCR TRIGGER, REMOTE ACTIVATE, and RESET pins )
Peak output current
I
O(pk)
V
IN
= 5.0 V, R
G
= 0
Ω,
V
O
= 0 V
Peak output voltage
Output off voltage
REMOTE ACTIVATE
current
REMOTE ACTIVATE
voltage
RESET current
RESET voltage
V
O(pk)
V
O(off)
I
ACT
V
ACT
I
RESET
V
RESET
V
IN
= 15 V, I
O
= 100 mA
V
IN
= 40 V
REMOTE ACTIVATE
pin = GND
REMOTE ACTIVATE pin
open
REMOTE ACTIVATE and
RESET pins = GND
RESET pin = open,
REMOTE ACTIVATE pin =
GND
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
All
All
All
All
All
All
12
0.1
-0.8
6.0
-0.8
6.0
V
V
mA
V
mA
V
1,2,3
All
-100
-600
mA
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-87740
SHEET
E
4
TABLE I. Electrical performance characteristics – Continued.
Conditions
-55°C
≤
T
A
≤
+125°C
V
IN
= 10 V
unless otherwise specified
Test
Symbol
Group A
subgroups
Device
type
Min
Limits
Unit
Max
Comparator sections (OV INDICATE, OV DELAY, OV INPUT, UV INPUT, UV DELAY, and UV INDICATE pins).
For device 02, OV and UV INPUTS are tested inverted and noninverted respectively.
Input threshold
voltage
Input bias current
Delay saturation
voltage
Delay high level voltage
Delay charging current
Indicate saturation
Indicate leakage
current
1/
V
IN(th)
1
2,3
I
IB
V
D(sat)
V
DH
I
D
V
IND(SAT)
I
L(IND)
V
D
= 0 V
I
L
= +10 mA
V
IND
= 40 V
Sense input = 0 V
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
1,2,3
All
All
All
All
All
All
-200
All
2.45
2.40
2.55
2.60
-1.0
0.5
8.0
-300
0.5
1.0
µA
V
V
µA
V
µA
V
Current limit section ( CL INV INPUT, CL NI INPUT, OFFSET/COMP, CL OUTPUT, GROUND pins )
Input voltage range
Input bias current
V
INR
I
IB
V
OS
OFFSET/COMP pin =
open, V
CM
= 0 V
OFFSET/COMP pin =
open, V
CM
= 0 V
10 kΩ
±0.1%
from
OFFSET/COMP pin to
GROUND, 2 kΩ from C
L
OUTPUT to V
REF
Common mode
rejection
Open loop voltage
gain
Output saturation
Output leakage
1/
CMRR
0 V
≤
V
CM
≤
12 V,
V
IN
= 15 V
A
VOL
OFFSET/COMP pin =
open, V
CM
= 0 V
I
L
= -10 mA
V
IND
= 40 V
4,5,6
All
72
dB
4,5,6
All
60
dB
1,2,3
1,2,3
All
All
0
V
IN
–
3.0 V
-1.0
V
µA
mV
Input offset voltage
1,2,3
All
10
80
120
V
O(SAT)
I
L(IND)
1,2,3
1,2,3
All
All
0.5
1.0
V
µA
Input voltage rising on pin OV input and falling on pin UV input.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-87740
SHEET
E
5