Micrel, Inc.
LOW POWER HEX
TTL-to-ECL
TRANSLATOR
DESCRIPTION
SY100S324
SY100S324
FEATURES
■
■
■
■
Max. propagation delay of 1.4ns
I
EE
min. of –70mA
Industry standard 100K ECL levels
Extended supply voltage option:
V
EE
= –4.2V to –5.5V
■
Differential outputs
■
Voltage and temperature compensation for improved
noise immunity
■
Internal 75K
Ω
input pull-down resistors
■
Twice as fast as Fairchild’s 324
■
Function and pinout compatible with Fairchild F100K
■
Available in 24-pin CERPACK and 28-pin PLCC
packages
The SY100S324 is a hex translator designed to convert
TTL logic levels to 100K ECL levels. The inputs are TTL
compatible with differential outputs that can either be
used as an inverting/non-inverting translator or as
differential line drivers. A common Enable (E), when LOW,
holds all inverting outputs HIGH and holds all non-
inverting outputs LOW.
When used in the differential mode, due to its high
common mode rejection, it overcomes voltage gradients
between the TTL and ECL ground systems. The V
EE
and
V
TTL
power may be applied in either order.
BLOCK DIAGRAM
E
D
0
D
1
D
2
D
3
D
4
D
5
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
PIN NAMES
Pin
D
0
–D
5
E
Q
0
–Q
5
Q
0
–Q
5
V
EES
V
TTL
V
CCA
Data Inputs
Enable Inputs
Data Outputs
Complementary Data Outputs
V
EE
Substrate
TTL V
CC
Power Supply
V
CCO
for ECL Outputs
Function
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
Rev.: H
Amendment: /0
1
Issue Date: June 2006
Micrel, Inc.
SY100S324
PACKAGE/ORDERING INFORMATION
Q
1
Q
1
Q
0
V
EES
Q
0
D
2
D
1
Ordering Information
Part Number
18
17
16
25 24 23 22 21 20 19
Package
Type
F24-1
F24-1
J28-1
J28-1
J28-1
J28-1
Operating
Range
Commercial
Commercial
Commercial
Commercial
Industrial
Industrial
Package
Marking
SY100S324FC
SY100S324FC
SY100S324JC
SY100S324JC
SY100S324JY with
Pb-Free bar-line indicator
SY100S324JY with
Pb-Free bar-line indicator
Lead
Finish
Sn-Pb
Sn-Pb
Sn-Pb
Sn-Pb
Matte-Tin
Matte-Tin
Q
2
Q
2
V
CC
V
CC
V
CCA
V
CCA
Q
3
26
27
28
1
2
3
4
5
6
7
8
9
10 11
D
0
V
TTL
E
V
EES
V
EE
D
3
D
4
SY100S324FC
SY100S324FCTR
(1)
SY100S324JC
SY100S324JCTR
(1)
SY100S324JY
(2)
SY100S324JYTR
(1, 2)
Notes:
Top View
PLCC
J28-1
15
14
13
12
V
EES
Q
5
Q
3
Q
4
Q
4
28-Pin PLCC (J28-1)
V
TTL
Q
5
D
5
1. Tape and Reel.
2. Pb-Free package is recommended for new designs.
V
EE
D
0
24
23
22
21
D
1
D
2
Q
0
Q
0
Q
1
Q
1
D
3
E
20 19
18
17
D
4
1
2
3
4
5
6
7
8
9
10
11
12
D
5
Q
5
Q
5
Q
4
Q
4
Q
3
Top View
Flatpack
F24-1
16
15
14
13
V
CC
Q
2
Q
2
V
CCA
24-Pin Cerpack (F24-1)
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
V
CCA
Q
3
2
Micrel, Inc.
SY100S324
DC ELECTRICAL CHARACTERISTICS
V
EE
= –4.2V to –5.5V unless otherwise specified, V
CC
= V
CCA
= GND, V
TTL
= +4.5V to +5.5V
Symbol
V
OH
V
OL
V
OHC
V
OLC
V
IH
V
IL
V
CD
I
IH
Parameter
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Input HIGH Current
Data
Enable
Input HIGH Current
Breakdown Test, All Inputs
Input LOW Current
Data
Enable
V
EE
Power Supply Current
V
TTL
Power Supply Current
Min.
–1025
–1810
–1035
—
2.0
0
—
—
—
—
Sim.
–986
–1674
—
—
—
—
—
—
—
—
Max.
–880
–1620
—
–1610
5.0
0.8
–1.5
20
120
1.0
Unit
mV
mV
mV
mV
V
V
V
µA
mA
V
IN
= V
IH
(Max.)
V
IN
= V
IL
(Min.)
V
IN
= V
IH
(Min.)
V
IN
= V
IL
(Max.)
Guaranteed HIGH Signal for All Inputs
Guaranteed LOW Signal for All Inputs
I
IN
= –10mA
V
IN
= +2.4V
All Other Inputs V
IN
= GND
V
IN
= +5.5V, V
TTL
= Max.,
All Other Inputs V
IN
= GND
V
IN
= +0.4V
All Other Inputs V
IN
= V
IH
All Inputs V
IN
= +4.0V
All Inputs V
IN
= GND
Loading with 50Ω to –2V
Condition
Loading with 50Ω
I
IH
I
IL
–1.2
–6.7
–70
—
—
—
–45
25
—
—
–28
35
mA
mA
mA
I
EE
I
TTL
AC ELECTRICAL CHARACTERISTICS
PLCC /FLATPACK
V
EE
= –4.2V to –5.5V unless otherwise specified, V
CC
= V
CCA
= GND, V
TTL
= +4.5V to +5.5V
Symbol
t
PLH
t
PHL
t
TLH
t
THL
Parameter
Propagation Delay
Data and Enable to Output
Transition Time
20% to 80%, 80% to 20%
Min.
400
350
Typ.
850
—
Max.
1400
1700
Unit
ps
ps
Condition
See Switching Wave Form Figures
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
SY100S324
SWITCHING WAVEFORM
2.5 ± 0.3 ns
80%
50%
20%
0V
t
PHL
t
PLH
2.5 ± 0.3 ns
+3.0V
INPUT
+1.5V
COMPLEMENT
50%
t
PLH
80%
TRUE
t
TLH
t
PHL
50%
20%
t
THL
Figure 1. Propagation Delay and Transition Times
Note:
V
EE
= –4.2V to –5.5V unless otherwise specified, V
CC
= V
CCA
= GND, V
TTL
= +4.5V to +5.5V
TEST CIRCUIT
V
IH
V
TTL
0.1µF
0.1µF
0.1µF
L1
SCOPE
CHAN A
R
T
L2
SCOPE
CHAN B
R
T
L3
PULSE
GENERATOR
0.1µF
2.5µF
V
EE
V
CC
Figure 2. AC Test Circuit
Notes:
V
CC
, V
CCA
= +2V, V
EE
= –2.5V, V
TTL
= +7.0V, V
IH
= +6.0V
L1, L2 and L3 = equal length 50Ω impedance lines
R
T
= 50Ω terminator internal to scope
Decoupling 0.1µF from GND to V
CC
, V
EE
and V
TTL
All unused outputs are loaded with 50Ω to GND
C
L
= Fixture and stray capacitance
≤
3pF
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
SY100S324
24-PIN CERPACK (F24-1)
Rev. 03
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
5
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