19-0046; Rev. 1; 3/94
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
_______________General Description
The MAX532 is a complete, dual, serial-input, 12-bit
multiplying digital-to-analog converter (MDAC) with out-
put amplifiers. No external user trims are required to
achieve full specified performance. The MAX532’s 3-
wire serial interface minimizes the number of package
pins, so it uses less board space than parallel-interface
parts. The interface is SPI™, QSPI™ and Microwire™
compatible. A serial output, DOUT, allows cascading
of two or more MAX532s and read-back of the data
written to the device.
The device’s serial interface minimizes digital-noise
feedthrough from its logic pins to its analog outputs.
Serial interfacing also simplifies opto-coupler-isolated
or transformer-isolated applications.
The MAX532 is specified with ±12V to ±15V power sup-
plies. All logic inputs are TTL and CMOS compatible. It
comes in space-saving 16-pin DIP and wide SO packages.
____________________________Features
o
Two 12-Bit MDACs with Output Amplifiers
o
Fast, 6MHz 3-Wire Interface
o
SPI, QSPI, and Microwire Compatible
o
±12V Output Swing
o
±10mA Output Current
o
2.5µs Settling Time to ±1/2LSB
o
Guaranteed Monotonic Over Temperature
o
Low Integral Nonlinearity: ±1/2LSB Max
o
Low Gain Tempco: 2ppm/°C
o
Operates from ±12V to ±15V Supplies
o
Power-On Reset
o
Available in 16-Pin DIP and Wide SO Packages
MAX532
________________________Applications
Automatic Test Equipment
Arbitrary Waveform Generators
Programmable-Gain Amplifiers
Motion Control Systems
Servo Controls
______________Ordering Information
PART
MAX532ACPE
MAX532BCPE
MAX532ACWE
MAX532BCWE
MAX532BC/D
TEMP. RANGE PIN-PACKAGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
16 Plastic DIP
16 Plastic DIP
16 Wide SO
16 Wide SO
Dice*
ERROR
(LSBs)
±1/2
±1
±1/2
±1
±1
________________Functional Diagram
V
DD
Ordering Information continued on last page.
* Contact factory for dice specifications.
MAX532
VREFA
__________________Pin Configuration
DACA
LATCH
DACA
RFBA
VOUTA
RFBA
AGNDA
VREFA
24-BIT SHIFT
REGISTER
DOUT
RFBB
VOUTA
AGNDA
AGNDB
VOUTB
1
2
3
4
5
6
16
V
DD
15
LDAC
14
CS
TOP VIEW
DIN
SCLK
MAX532
13
DIN
12
DOUT
11
SCLK
10
DGND
9
V
SS
CS
DACB
LDAC
VREFB
DACB
LATCH
VOUTB
AGNDB
VREFB
7
RFBB
8
V
SS
DGND
DIP/Wide SO
™Microwire is a trademark of National Semiconductor Corp. SPI and QSPI are trademarks of Motorola, Inc.
________________________________________________________________
Maxim Integrated Products
1
Call toll free 1-800-998-8800 for free samples or literature.
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
MAX532
ABSOLUTE MAXIMUM RATINGS
Pin Voltages
V
DD
to DGND, AGNDA, AGNDB........................-0.3V to +17V
V
SS
to DGND, AGNDA, AGNDB (Note 1) ..........+0.3V to -17V
VREFA, VREFB.............................(V
SS
- 0.3V) to (V
DD
+ 0.3V)
AGNDA, AGNDB .....................(DGND - 0.3V) to (V
DD
+ 0.3V)
VOUTA, VOUTB ...........................(V
SS
- 0.3V) to (V
DD
+ 0.3V)
RFBA, RFBB.................................(V
SS
- 0.3V) to (V
DD
+ 0.3V)
SCLK, DIN, DOUT,
LDAC, CS
..(DGND - 0.3V) to (V
DD
+ 0.3V)
DOUT Sink Current .............................................................20mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) ..........842mW
Wide SO (derate 9.52mW/°C above +70°C)................762mW
CERDIP (derate 10.00mW/°C above +70°C) ...............800mW
Operating Temperature Ranges:
MAX532_C__ ......................................................0°C to +70°C
MAX532_E__....................................................-40°C to +85°C
MAX532_MJE ................................................-55°C to +125°C
Junction Temperatures:
MAX532_C__, E__........................................................+150°C
MAX532_MJE...............................................................+175°C
Storage Temperature Range ........................... -65°C to +160°C
Lead Temperature (soldering, 10sec) ........................... +300°C
Note 1:
If V
SS
is open-circuited with V
DD
and either AGND applied, the V
SS
pin will float positive, exceeding the Absolute Maximum Ratings.
A Schottky diode connected between V
SS
and GND ensures the maximum ratings will not be exceeded.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= 11.4V to 16.5V, V
SS
= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA and VREFB = +10V, R
L
= 2kΩ,
C
L
= 100pF, VOUT_ connected to RFB_, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Offset Error
Zero-Code Offset
Temperature Coefficient
INL
Guaranteed monotonic
T
A
= +25°C, MAX532_
DAC latch loaded
with all 0s
DAC latch loaded with all 0s
T
A
= +25°C, DAC latch
loaded with all 1s
Gain Error
T
A
= T
MIN
to T
MAX
, DAC
latch loaded with all 1s
Gain-Error Temperature
Coefficient
REFERENCE INPUTS (VREFA, VREFB)
VREFA, VREFB Input
Resistance
VREFA, VREFB Input
Resistance Matching
8
10
±0.5
13
±3.0
kΩ
%
MAX532A
MAX532B
MAX532A
MAX532B
±2
T
A
= T
MIN
to T
MAX
, MAX532A
T
A
= T
MIN
to T
MAX
, MAX532B
±5
±2
±5
±4
±7
ppm/°C
of FSR
LSB
MAX532A
MAX532B
SYMBOL
CONDITIONS
MIN
12
±1/2
±1
±1
±2
±3
±4
µV/°C
mV
TYP
MAX
UNITS
Bits
LSB
LSB
STATIC PERFORMANCE
(Note 1)
2
_______________________________________________________________________________________
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 11.4V to 16.5V, V
SS
= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA and VREFB = +10V, R
L
= 2kΩ, C
L
= 100pF,
VOUT_ connected to RFB_, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
2.4
0.8
Digital inputs at 0V or V
DD
±1
8
I
SINK
= 5mA
I
SINK
= 16mA
V
DOUT
= 0V to V
DD
0.08
0.2
±10
15
0.4
TYP
MAX
UNITS
V
V
µA
pF
DIGITAL INPUTS (SCLK, DIN,
LDAC
,
CS
)
V
INH
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance (Note 2)
DIGITAL OUTPUT (DOUT)
(Note 3)
Output Voltage Low
Output High Leakage
Output High Capacitance
(Note 2)
V
OL
I
LKG
C
OUT
V
INL
MAX532
V
µA
pF
ANALOG OUTPUTS (VOUTA, VOUTB)
DC Output Impedance
Short-Circuit Current
VOUTA, VOUTB connected to AGNDA, AGNDB
Output Voltage Swing
POWER REQUIREMENTS
Positive Supply Voltage
Negative Supply Voltage
0.2
20
(V
DD
- 2.5)
to
(V
SS
+ 2.5)
Ω
mA
V
V
DD
V
SS
∆Full
scale/∆V
DD
, V
DD
= 11.4V to 16.5V, VREF = -8.9V,
DAC latches loaded with all 1s
11.4
-11.4
16.5
-16.5
±0.035
V
V
Power-Supply Rejection
PSR
∆Full
scale/∆V
SS
, V
SS
= -11.4V to -16.5V, VREF = 8.9V,
DAC latches loaded with all 1s
±0.035
5
4
10
6
LSB/%
Positive Supply Current
Negative Supply Current
AC CHARACTERISTICS
Voltage-Output
Settling Time
Slew Rate
Digital-to-Analog
Glitch Impulse
I
DD
I
SS
Output unloaded
Output unloaded
mA
mA
Settling time to within 1/2 LSB of final DAC value; DAC
latch alternately loaded with all 0s and all 1s
2.5
8
µs
V/µs
nV-s
DAC latch alternately loaded with 011...11 and 100...00
VREFA = 20V
p-p
10kHz
sine wave; DAC latches
loaded with all 0s
VREFB = 20V
p-p
10kHz
sine wave; DAC latches
loaded with all 0s
60
VREFA to VOUTB
Channel-to-Channel
Isolation
VREFB to VOUTA
-100
dB
-100
_______________________________________________________________________________________
3
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
MAX532
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 11.4V to 16.5V, V
SS
= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V, VREFA and VREFB = +10V, R
L
= 2kΩ, C
L
= 100pF,
VOUT_ connected to RFB_, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Multiplying Feedthrough
Error
Unity-Gain Small-Signal
Bandwidth
Full-Power Bandwidth
SYMBOL
CONDITIONS
VREF = 20V
p-p
10kHz sine wave;
DAC latch loaded with all 0s
VREF = 100mV
p-p
sine wave;
DAC latch loaded with all 1s
VREF = 20V
p-p
sine wave;
DAC latch loaded with all 1s
THD
VREF = 6V
RMS
, 1kHz sine wave;
DAC latch loaded with all 1s
CS
= 1; transitions on SCLK,
LDAC,
DIN
DACA code all 1s, DACB code transition from all 0s to all 1s
0.1Hz to 10Hz
MIN
TYP
-77
MAX
UNITS
dB
1.0
MHz
125
kHz
Total Harmonic Distortion
Digital Feedthrough
Digital Crosstalk
Output Noise Voltage
-90
1.1
10
2
dB
nV-s
nV-s
µV
RMS
Note 1:
Static performance tested at V
DD
= +15V, V
SS
= -15V. Performance over supplies guaranteed by PSR test.
Note 2:
Guaranteed by design. Not subject to production testing.
Note 3:
Open-drain output.
TIMING CHARACTERISTICS
(V
DD
= 11.4V to 16.5V, V
SS
= -11.4V to -16.5V, AGNDA = AGNDB = DGND = 0V) (Notes 4, 5)
PARAMETER
SCLK Clock Frequency
SCLK Pulse Width High
SCLK Pulse Width Low
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
CS
Fall to SCLK Rise Setup Time
CS
Rise to SCLK Rise Setup Time
SCLK Fall to
CS
Fall Hold Time
SCLK Rise to
CS
Rise Hold Time
CS
Pulse Width High
SCLK Fall to DOUT Valid (Note 6)
CS
Fall to DOUT Enable (Note 7)
CS
Rise to DOUT Disable (Note 7)
LDAC
Pulse Width Low
CS
Rise to
LDAC
Fall Setup Time
SYMBOL
f
CLK
t
CH
t
CL
t
DS
t
DH
t
CSS0
t
CSS1
t
CSH0
t
CSH1
t
CSW
t
DO
t
DV
t
TR
t
LDAC
t
LDACS
C
L
= 20pF, R
PULL-UP
= 1kΩ to 5V
C
L
= 20pF, R
PULL-UP
= 1kΩ to 5V
C
L
= 20pF, R
PULL-UP
= 1kΩ to 5V
60
100
80
80
50
0
50
50
5
80
120
0
200
100
60
CONDITIONS
MIN
TYP
MAX
6.25
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 4:
All input signals are specified with t
R
= t
F
≤
5ns. Logic input swing is 0V to 5V.
Note 5:
See Figure 1.
Note 6:
Timing is for SCLK fall to DOUT fall to 0.8V, or for SCLK fall to DOUT rise to 2.4V. Additional time must be added for any
larger passive RC pull-up delay.
Note 7:
DOUT enable: DOUT falls to 4.5V from 5.0V. DOUT disable: DOUT rises to 0.5V from 0V.
4
_______________________________________________________________________________________
Dual, Serial-Input,
Voltage-Output, 12-Bit MDAC
__________________________________________Typical Operating Characteristics
(V
DD
= 15V, V
SS
= -15V, R
L
= 2kΩ, C
L
= 100pF, unless otherwise noted.)
OUTPUT VOLTAGE SWING
vs. RESISTIVE LOAD
25
NOISE SPECTRAL DENSITY (nV Hz)
VREF = 20V
p-p
at 1kHz
20
V
OUT
(V
p-p
)
300
VREF = 0V
DAC CODE = 11...111
GAIN = -1
GAIN (dB)
MAX532
NOISE SPECTRAL DENSITY
5
0
-5
-10
200
-15
-20
-25
-30
-35
0
-40
10
100
1k
FREQUENCY (Hz)
10k
100k
LARGE-SIGNAL FREQUENCY RESPONSE
15
VREF = 20Vp-p
DAC CODE = 11...111
GAIN = -1
10
100
5
0
10
100
1k
10k
LOAD RESISTANCE (Ω)
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
SMALL-SIGNAL FREQUENCY RESPONSE
5
0
ATTENUATION (dB)
-5
GAIN (dB)
-10
-15
-20
-25
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
1k
VREF = 100mV
p-p
DAC CODE = 11...111
MULTIPLYING FEEDTHROUGH ERROR
-94
VREFA = 20V
p-p
VREFB = AGNDB
DAC CODE = 00...00
THD (dB)
-96
-98
-100
-102
-104
-106
10k
100k
1M
TOTAL HARMONIC DISTORTION + NOISE
vs. FREQUENCY (BANDWIDTH = 80kHz)
VREF = 6V
RMS
DAC CODE = 111...111
100
1k
FREQUENCY (Hz)
10k
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION + NOISE
vs. FREQUENCY (BANDWIDTH > 500kHz)
-60
-65
-70
THD (dB)
-75
-80
-85
-90
-95
-100
100
1k
10k
100k
FREQUENCY (Hz)
VREF = 6V
RMS
DAC CODE = 111...111
_________________________________________________________________________________________________
5
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