GENLINX
GS9022
TM
Digital Video Serializer
DATA SHEET
FEATURES
• built-in 75
Ω
cable driver with two serial outputs
• standard independent operation
• space saving 28 pin PLCC package
• 650 mW typical power dissipation (data output
driving 75
Ω
load).
• supports bit rates to 400 Mb/s
• accepts 8 bit and 10 bit TTL and CMOS
compatible parallel data inputs
• fully compatible with SMPTE 259M serial digital
standard
• single +5 or -5 volt supply
APPLICATIONS
• 4ƒ
SC
, 4:2:2 and 360 Mb/s serial digital interfaces for:
Video cameras
Signal generators
VTRs
Portable equipment
GS9022-CPJ
GS9022-CTJ
28 pin PLCC
28 pin PLCC Tape
O°C to 70°C
O°C to 70°C
DEVICE DESCRIPTION
The GS9022 is a monolithic bipolar integrated circuit designed
to serialize SMPTE 125M and SMPTE 244M bit parallel digital
signals as well as other 8 or 10 bit parallel formats. This device
performs the functions of sync detection, parallel to serial
conversion, data scrambling (using the X
9
+ X
4
+1 algorithm),
10x parallel clock multiplication and conversion of NRZ to
NRZI serial data. The data rate is automatically set for SMPTE
259M data rates to 400 Mb/s. Other features include a lock
detect output and an internal cable driver capable of driving
two 75Ω loads.
The device requires a single +5 volt or -5 volt supply and
typically consumes 650 mW of power while driving two 75
Ω
loads. The 28 pin PLCC packaging assures a small footprint
for the complete encoder function.
ORDERING INFORMATION
Part Number
Package
Temperature
SYNC
DETECT
DISABLE
25
22
SYNC
DETECT
RISE TIME
CONTROL
SCRAMBLER
NRZ
NRZI
SERIAL DATA
SERIAL DATA
PARALLEL 3-12
DATA
IN (10 BITS)
INPUT
LATCH
23
P/S
CONVERTER
PLD
SCLK
MUX
PCLK
13
PHASE
FREQUENCY
DETECT
CHARGE
PUMP
V
CO
LOOP
FILTER
17
DIV BY 2
GENERATOR
DIV BY 10
GENERATOR
OSCILLATOR
GS9022
LOCK
DETECT
14
LOCK
DETECT
19
R
VCO
28
REGULATOR CAP
26
C
OSC
FUNCTIONAL BLOCK DIAGRAM
Revision Date: August 1997
Document No. 521 - 42 - 01
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
Gennum Japan Corporation: A-302 Miyamae Village, 2-10-42 Miyamae, Suginami-ku, Tokyo 168, Japan
tel. (03) 3334-7700
fax (03) 3247-8839
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Supply Voltage
Input Voltage Range (any input)
DC Input Current (any one input)
Power Dissipation (V
S
= 5.25 V)
Operating Temperature Range
Storage Temperature Range
Lead Temperature (soldering 10 seconds)
VALUE/UNITS
5.5 V
-V
EE
< V
I
< V
CC
10 mA
910 mW
-65
°
C
≤
T
S
≤150
°
C
260 C
PD6
9
10
11
12
PD2
PD3
PD4
PD5
5
6
7
8
PIN CONNECTIONS
PD1
PD0
V
CC
V
CC
C
REG
V
EE
C
OSC
4
3
2
28
27
26
25
24
23
SYNC DET.
DISABLE
V
CCSD
SDO
SDO
V
EE
V
CC
R
VCO
0
°
C
≤
T
A
≤
70
°
C
°
GS9022
TOP VIEW
22
21
20
19
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
PD7
PD8
13
14
15
16
17
18
PD9
PCK
IN
LOCK V
EE
DET
V
CC
LF
V
EE
GS9022 - ENCODER DC ELECTRICAL CHARACTERISTICS
V
CC
= 5V, V
EE
= 0V, T = 0°C to 70°C unless otherwise shown
A
PARAMETER
Supply Voltage
Power Consumption
Supply Current
TTL Inputs-HIGH
TTL Inputs-LOW
Logic Input Current
TTL Outputs-HIGH
TTL Outputs-LOW
SYMBOL
V
S
P
D
I
S
V
IH
V
IL
I
IN
V
OH
V
OL
CONDITIONS
Operating Range
Data outputs driving two 75Ω loads
Data outputs driving two 75Ω loads
T
A
= 25°C
T
A
= 25°C
MIN
4.75
-
-
2.0
-
-
TYP
5.0
650
160
-
-
2.5
-
-
MAX
5.25
-
190
-
0.8
6.0
-
0.5
UNITS
V
mW
mA
V
V
µA
V
V
NOTES
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
2.4
-
GS9022 - ENCODER AC ELECTRICAL CHARACTERISTICS
V
CC
= 5V, V
EE
= 0V, T
A
= 0°C to 70°C, unless otherwise shown
PARAMETER
Serial Data Outputs
SDATA, SDATA
bit rates
signal swing
rise/fall times
jitter
Lock Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
BR
SDO
V
SDO
t
r
, t
f
t
j
t
lock
R
L
= 75Ω
(20 - 80%)
100
720
400
-
800
550
240
400
880
800
-
-
Mb/s
mVp-p
ps
ps p-p
ms
Note 1
Auto Standard
270 Mb/s
C
Loop filt
= 0.1µF
R
Loop filt
= 3.9kΩ
C
OSC
= 0.1µF
-
5
Parallel Data & Clock Inputs
risetime
setup
hold
t
R
t
SU
t HOLD
TA = 25°C
500
3
3
-
-
-
-
-
-
ps
ns
ns
Note 1:
Measured using PCLK as trigger source on 1 GHz oscilloscope
521 - 42 - 01
2
GS9022 Digital Video Serializer - Detailed Device Description
The GS9022 Serializer is a bipolar integrated circuit used to
convert parallel data into a serial format according to the
SMPTE 259M standard. The device encodes both eight and
ten bit TTL-compatible parallel signals producing serial data
rates up to 400 Mb/s. It operates from a single five volt supply
and is packaged in a 28 pin PLCC.
Functional blocks within the device include the input latches,
sync detector, parallel to serial converter, scrambler, NRZ to
NRZI converter, internal cable driver, PLL for 10 x parallel
clock multiplication and lock detect.
The parallel data (PD0-PD9) and parallel clock (PCKIN) are
applied via pins 3 through 13 respectively.
Sync Detector
The Sync Detector looks for the reserved words 000-003 and
3FC-3FF, in ten bit hexadecimal, or 00 and FF in eight bit
hexadecimal, used in the TRS-ID sync word. When the
occurrence of either all zeros or all ones at inputs PD2-PD9 is
detected, the lower two bits PD0 and PD1 are forced to zeros
or ones, respectively. This makes the system compatible with
eight or ten bit data. For non - SMPTE standard parallel data,
a logic input, Sync Detect Disable (25) is available to disable
this feature.
Scrambler
The Scrambler is a linear feedback shift register used to
pseudo-randomize the incoming serial data according to the
fixed polynomial (X
9
+X
4
+1). This minimizes the DC component
in the output serial data stream. The NRZ to NRZI converter
uses another polynomial (X+1) to convert a long sequence of
ones to a series of transitions, minimizing polarity effects.
Phase Locked Loop
The PLL performs parallel clock multiplication and provides
the timing signal for the serializer. It is composed of
a phase/frequency detector, charge pump, VCO
,
a
divide-by-ten counter, and a divide by two counter.
The phase/frequency detector allows a wider capture range
and faster lock time than that which can be achieved with a
phase discriminator alone. The discrimination of frequency
also eliminates harmonic locking. With this type of discriminator,
the PLL can be over-damped for good stability without
sacrificing lock time.
The charge pump delivers a 'charge packet' to the loop filter
which is proportional to the system phase error. Internal
voltage clamps are used to constrain the loop filter voltage
between approximately 1.8 and 3.4 volts.
The VCO, constructed from a current-controlled multivibrator,
features operation in excess of 400 Mb/s and a wide pull range
(≈
±
40% of centre frequency).
VCO Centre Frequency Selection
The wide VCO pull range allows the PLL to compensate for
variations in device processing, temperature variations and
changes in power supply voltage, without external adjustment.
A single external resistor is used to set the VCO current for all
standards.
The COSC pin is used to configure the VCO of the GS9022 in
one of three modes, as shown below:
C
OSC
0.1µF to GND
10k Resistor to VCC
10k Resistor to GND
Mode
Auto Standard
ƒ/2 ON
ƒ/2 OFF
In auto standard mode, the capacitor sets the sweep rate at
which the VCO toggles between ƒ and ƒ/2.
The ƒ/2 ON and ƒ/2 OFF modes are used to configure the
GS9022 VCO for single standard operation.
The lock detect circuit disables the serial data output when the
loop is not locked. The Lock Detect output is available from pin
14 and is HIGH when the loop is locked.
The true and complement serial data, SDO and SDO are
available from pins 22 and 23. These outputs will drive
two 75
Ω
co-axial cables with SMPTE level serial digital
video signals.
3
521 - 42 - 01
GS9022 PIN DESCRIPTIONS
PIN NO.
1
2
3-12
13
14
15
16
17
18
19
20
21
22, 23
24
25
26
27
28
SYMBOL
V
CC
V
CC
PD0-PD9
PCKIN
LOCK DET
V
EE
V
CC
LF
V
EE
R
VCO
V
CC
V
EE
SDO, SDO
V
CCSD
SYNC DET
DISABLE
C
OSC
V
EE
C
REG
TYPE
DESCRIPTION
Power Supply: Most positive power supply connection for the PLL and Scrambler.
Power Supply: Most positive power supply connection for the parallel data inputs and P/S
converter.
I
I
O
TTL level inputs of the parallel data words. PD0 is the LSB and PD9 is the MSB.
TTL level input of the parallel clock.
TTL level output which goes high when the internal PLL is locked.
Power Supply: Most negative power supply connection.
Power Supply: Most positive power supply connection for the PLL and Scrambler.
I
Connection for the R-C loop filter components.
Power Supply: Most negative power supply connection.
I
VCO frequency setting resistor. A 1% resistor is required.
Power Supply: Most positive power supply connection for the PLL and Scrambler.
Power Supply: Most negative power supply connection.
I
75
Ω
cable driver outputs (true and inverse).
Power Supply: Most positive power supply for cable driver outputs.
I
I
I
I
TTL level input that disables the internal sync detector when high. This allows the GS9022 to
serialize 8 or 10 bit non-SMPTE standard parallel data.
Toggles VCO between ƒ and ƒ/2.
Power Supply: Most negative power supply connection.
Compensation capacitor for internal voltage regulator that requires decoupling with a
0.1
µF
capacitor located as close as possible to the pin in series with an 820
Ω
Resistor.
521 - 42 - 01
4
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