REVISIONS
LTR
A
B
DESCRIPTION
Changes made to Table 1, updated paragraph 4.4.1f, and editorial
changes throughout. ksr
Constant acceleration changed for class Q and V to condition B for
case outline Y and remains condition D for devices built with case
outline X. ksr
Added T
R
and T
F
to section 1.4, and updated boilerplate paragraphs.
ksr
Added devices 05 – 08; Update to 1.3, made changes to IIL and IOZ
in Table I, made change to paragraph 4.2.2 and 4.4.1f, and updated
boilerplate paragraphs. ksr
Editorial changes to paragraphs 4.3 and 4.4. ksr
DATE (YR-MO-DA)
03-02-21
03-09-08
APPROVED
Raymond Monnin
Raymond Monnin
C
D
04-01-04
04-08-27
Raymond Monnin
Raymond Monnin
E
05-09-29
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
E
15
E
16
E
17
E
18
REV
SHEET
PREPARED BY
Kenneth Rice
CHECKED BY
Raj Pithadia
APPROVED BY
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
Raymond Monnin
DRAWING APPROVAL DATE
02 - 02 - 25
REVISION LEVEL
E
E
19
E
20
E
1
E
2
E
3
E
4
E
5
E
6
E
7
E
8
E
9
E
10
E
11
E
12
E
13
E
14
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, FIELD PROGRAMMABLE GATE
ARRAY, 72,000 GATES, MONOLITHIC
SILICON
SIZE
CAGE CODE
A
SHEET
67268
1
5962-01515
OF
20
5962-E514-05
DSCC FORM 2233
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
|
|
|
Federal
stock class
designator
\
-
|
|
|
RHA
designator
(see 1.2.1)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
04
05
06
07
08
Generic number
RT54SX72S
RT54SX72S-1
RT54SX72S
RT54SX72S-1
RTSX72SU
RTSX72SU-1
RTSX72SU
RTSX72SU-1
Circuit function
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
72,000 gate field programmable gate array
01515
01
|
|
|
Device
type
(see 1.2.2)
/
Q
|
|
|
Device
class
designator
(see 1.2.3)
X
|
|
|
Case
outline
(see 1.2.4)
C
|
|
|
Lead
finish
(see 1.2.5)
1/
2/
1/ 3/
1/
4/
1/ 5/
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level
as follows:
Device class
Device requirements documentation
M
Q or V
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Y
1/
Descriptive designator
See figure 1
See figure 1
Terminals
256
208
Package style
Ceramic Quad Flat Pack
Ceramic Quad Flat Pack
2/
3/
4/
5/
Timing performance of the RT54SX72S-1 and RTSX72SU-1 devices shall be approximately 15% faster than the
RT54SX72S and RTSX72SU devices (End users may select the appropriate device speed grade through timing calculations
based on device data sheet or timing simulation of specific designs with the Designer software (See 6.7 herein).)
Device type 03 is device type 01 with additional testing (see 4.2.2.f)
Device type 04 is device type 02 with additional testing (see 4.2.2.f)
Device type 07 is device type 05 with additional testing (see 4.2.2 f)
Device type 08 is device type 06 with additional testing (see 4.2.2 f)
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-01515
SHEET
E
2
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
1.3 Absolute maximum ratings (for 2.5V/3.3V/5.0V operating conditions). 4/
DC supply voltage range (V
CCI
) ....................................................... -0.3 to +6.0 V dc
DC supply voltage range (V
CCA
) ...................................................... -0.3 to +3.0 V dc
Input voltage range (V
I
) .................................................................... -0.5 to +6.0 V dc
Input voltage(V
I
) for bi-directional I/Os when using 3.3V PCI ............ -0.5 to (+V
CCI
+0.5) V dc
Output voltage range (V
O
) ................................................................ -0.5 to (+V
CCI
+0.5) V dc
Storage temperature range (V
STG
) .................................................. -65
o
C to +150
o
C
o
Lead temperature (soldering, 10 seconds) ....................................... 300 C
Thermal resistance, junction-to-case (Θ
JC
for Case X and Y) .......... 0.5
o
C/W
Maximum junction temperature (T
J
) ................................................. 150
o
C
1.4 Recommended operating conditions.
3.3V power supply voltage range ...................................................... 3.0 to 3.6 V dc (±10% V
CCI
)
5.0V power supply voltage range ...................................................... 4.5 to 5.5 V dc (±10% V
CCI
)
2.5V power supply voltage range ...................................................... 2.25 to 2.75 V dc (±10% V
CCA
)
Case operating temperature range (T
C
) ........................................... -55
o
C to +125
o
C
Input transition time T
R
and T
F
........................................................ 10 ns 5/
1.5 Digital logic testing for device classes Q and V.
Fault coverage measurement of manufacturing
logic tests (MIL-STD-883, test method 5012) .................................... 100 percent 6/
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard For Microcircuit Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://assist.daps.dla.mil/quicksearch/
or
www.dodssp.daps.mil
or from the
Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
4/
5/
6/
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
If T
R
and T
F
exceeds the limit of 10 ns, the device manufacturer cannot guarantee device functionality.
100 percent test coverage of blank programmable logic devices.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-01515
SHEET
E
3
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DoDISS
cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DoDISS are the issues of the
documents cited in the solicitation.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM Standard F1192M-95 -
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by
Heavy Ion Irradiation of Semiconductor Devices.
(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials,
1916 Race Street, Philadelphia, PA 19103.)
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)
JEDEC Standard EIA/JESD78
-
IC Latch-Up Test.
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington,
VA 22201.)
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the
documents. These documents also may be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless
a specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.
3.2.3 Truth table(s).
3.2.3.1 Unprogrammed devices. The truth table or test vectors for unprogrammed devices for contracts involving no altered
item drawing is not part of this drawing. When required in screening (see 4.2 herein) or qualification conformance inspection,
groups A, B, C, D, or E (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test. A minimum of 90
percent of the total number of logic modules shall be utilized or at least 25 percent of the total logic modules shall be utilized for
any altered item drawing pattern.
3.2.3.2 Programmed devices. The truth table or test vectors for programmed devices shall be as specified by an attached
altered item drawing.
3.2.4 Switching test circuit and waveforms. The switching test circuit and waveforms diagram shall be as specified on
figure 3.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table I.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-01515
SHEET
E
4
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 42 (see MIL-PRF-38535, appendix A).
3.11 Processing options. Since the device is capable of being programmed by either the manufacturer or the user to result in
a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing.
3.11.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 4.4.1
and table IIA. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program
configuration.
3.11.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions
herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in)
electrical parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.
The test circuit shall be maintained by the manufacturer under document revision level control and shall be made
available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases,
and power dissipation, as applicable, in accordance with the intent specified in method 1015.
(1) Dynamic burn-in for device class M (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1b herein).
c.
Interim and final electrical test parameters shall be as specified in table IIA herein.
b.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-01515
SHEET
E
5
嵌入式系统
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