Data rate ranges from 50Mb/s to 266Mb/s. However, some degradation may be incurred in overall performance.
Specified in average optical input power and measured with 2
23
-1 PRBS at 125Mb/s and 1310nm wavelength with optical input rise/fall time
of 2.5ns and optimum sampling.
3
Defined as 12.6 times the rms value per FDDI PMD.
2
21737-0931, Rev. A
04-05-2006
TRXNFEMM
Transmitter Electrical Interface
(over Operating Case Temperature,
V
CC
= 3.13 to 3.47V)
Parameter
Input Voltage Swing (TD+ & TD-)
1
Input HIGH Voltage (TX Disable)
Input LOW Voltage (TX Disable)
1
2
2
2
Symbol
V
PP-DIF
V
IH
V
IL
Minimum
0.50
2.0
0
Typical
-
-
-
Maximum
2.4
V
CC
0.8
Units
V
V
V
Differential peak-to-peak voltage.
There is an internal 4.7 to 10kΩ pull-up resistor to
VccT.
Receiver Electrical Interface
(over Operating Case Temperature,
V
CC
= 3.13 to 3.47V)
Parameter
Output Voltage Swing (RD+ & RD-)
1
Output HIGH Voltage (LOS)
2
Output LOW Voltage (LOS)
2
1
2
Symbol
V
PP-DIF
V
OH
V
OL
Minimum
0.6
2.0
0
Typical
-
-
-
Maximum
2.0
V
CC
+ 0.3
0.5
Units
V
V
V
Differential peak-to-peak voltage across external 100Ω load.
Open collector compatible, 4.7 to 10kΩ pull-up resistor to
Vcc
(Host Supply Voltage).
Electrical Power Supply Characteristics
(over Operating Case Temperature,
V
CC
= 3.13 to 3.47V)
Parameter
Supply Voltage
Supply Current
Symbol
Vcc
Icc
Minimum
3.13
-
Typical
3.3
222
Maximum
3.47
245
Units
V
mA
Module Definition
MOD_DEF(0)
pin 6
TTL LOW
MOD_DEF(1)
pin 5
SCL
MOD_DEF(2)
pin 4
SDA
Interpretation by Host
Serial module definition protocol
Electrical Pad Layout
Host Board Connector Pad Layout
20
19
18
17
16
15
14
13
12
11
TX GND
TD- (TX DATA IN-)
TD+ (TX DATA IN+)
TX GND
VccTX
VccRX
RX GND
RD+ (RX DATA OUT+)
RD- (RX DATA OUT-)
RX GND
1
2
3
4
5
6
7
8
9
10
TX GND
20
TX Fault
TX Disable
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
NO CONNECTION
LOS
1
2
3
4
19
18
17
16
15
14
13
12
11
Toward
Bezel
5
6
7
Toward
ASIC
RX GND
RX GND
8
9
Top of Board
Bottom of Board
(as viewed thru top of board)
10
Pin 2 Internally Grounded.
3
21737-0931, Rev. A
04-05-2006
TRXNFEMM
Example of SFP host board schematic
Vcc
3.3V
Vcc
3.3V
+
1
µ
H coil or ferrite bead
(<0.2
Ω
series resistance)
10
0.1
0.1
16
8
4
5
6
R
R
R
LOS
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
(100
Ω
to ground internally)
RX DATA OUT+
to 50
Ω
load
RX DATA OUT-
to 50
Ω
load
+
15
10
0.1
TRXNFEMM
TX Disable
50
Ω
line
TX DATA IN+
TX DATA IN-
50
Ω
line
19
18
3
100
50
Ω
line
50
Ω
line
13
12
1, 9,10,11,14,17,20
Ω
R: 4.7 to 10kΩ
200
SOURCE FWHM SPECTRAL WIDTH (nm)
3.0
180
1.5
3.5
160
2.0
140
2.5
Source rise & fall time (ns)
3.0
120
3.5
100
1280
1300
1320
1340
1360
1380
SOURCE CENTER WAVELENGTH (nm)
Figure 1 - Trade-off curves in FDDI PMD document
Application Notes
Electrical interface:
All signal interfaces are compliant
with the SFP MSA specification. The high speed DATA
interface is differential AC-coupled internally and can be
directly connected to a 3.3V SERDES IC. All low speed
control and sense output signals are open collector TTL
compatible and should be pulled up with a 4.7 - 10kΩ
resistor on the host board.
Loss of Signal (LOS):
The Loss of Signal circuit monitors
the level of the incoming optical signal and generates a logic
HIGH when an insufficient photocurrent is produced.
4
TX Fault:
Per SFP MSA, pin 2 is TX Fault. This transceiver
is LED based and does not support TX Fault. Pin 2 is
internally connected to transmitter circuit ground (TX GND)
to indicate normal operation.
TX Disable:
When the TX Disable pin is at logic HIGH, the
transmitter optical output is disabled (less than -45dBm).
Serial Identification:
The module definition of SFP
is indicated by the three module definition pins,
MOD_DEF(0), MOD_DEF(1) and MOD_DEF(2). Upon
power up, MOD_DEF(1:2) appear as NC (no connection),
21737-0931, Rev. A
04-05-2006
TRXNFEMM
Application Notes (Cont.)
and MOD_DEF(0) is TTL LOW. When the host system
detects this condition, it activates the serial protocol
(standard two-wire I
2
C serial interface) and generates the serial
clock signal (SCL). The negative edge clocks data from the
SFP EEPROM.
The serial data signal (SDA) is for serial data transfer. The
host uses SDA in conjunction with SCL to mark the start
and end of serial protocol activation.
The data transfer protocol and the details of the mandatory
and vendor specific data structures are defined in the SFP MSA.
Power supply and grounding:
The power supply line should
be well-filtered. All 0.1µF power supply bypass capacitors
should be as close to the transceiver module as possible.
Package Outline
56.6
2.2 REF
13.67
13.54
.54
.53
1.02
.0
6.25 0.05
.246 .002
8.89
.4
47.35
1.86
8.51
.335
13.87 0.20
.546 .008
1.78
.1
41.80 0.15
1.646 .006
44.98 0.20
1.771 .008
Dimensions in inches [mm]
Default tolerances:
.xxx = + .005”, .xx = + .01”
Ordering Information
Model Name
TRXNFEMM4BSS
TRXNFEMM4ESS
TRXNFEMM4ASS
Operating Case Temperature
- 5°C to +70°C
- 5°C to +85°C
- 40°C to +85°C
Latch Color
Silver
Silver
Silver
Nominal
Wavelength
1310nm
1310nm
1310nm
Optical Communication Products, Inc.
6101 Variel Avenue, Woodland Hills, CA 91367, Tel.: 818-251-7100, FAX: 818-251-7111, www.ocp-inc.com
Optical Communication Products, Inc. reserves the right to make changes in equipment design or specifications without notice. Information supplied by Optical Communication
Products, Inc. is believed to be accurate and reliable. However, no responsibility is assumed by Optical Communication Products, Inc. for its use nor for any infringements of
third parties, which may result from its use. No license is granted by implication or otherwise under any patent right of Optical Communication Products, Inc.
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