Metal Glaze
™
High Power
Density Surface Mount
Power Resistor
MRC Series
•
1/2 watt in 1/8 watt package
•
1 watt in 1/2 watt package (2010 footprint)
•
MRC1/2: 0.05
Ω
to 1.0
Ω
(contact factory for higher values)
•
150°C maximum operating temperature
•
Superior surge handling capability
Metal Glaze
™
thick film
element fired at 1000°C to
solid ceramic substrate
High temperature
dielectric coating
60/40 Solder over nickel barrier
Environmental Data
Size
Industry
Code
1
Footprint
IRC
Type
Max.
Working
Power Rating Voltage
2
Tolerance
Max.
Resistance
TCR
(±%)
3
(ppm/°C)
3
Voltage Range (ohms)
3
0.1 to 0.99
C
1206
MRC1/2
1/2W @ 70°C
200
400
1.0 to 10K
20 to 10K
E
2010
MRC1
1W @ 70°C
350
700
0.05 to 0.099
0.10 to 1.0
1,2,5
1,2,5
0.25, 0.5
2,5
1,2,5
100
50,100
50,100
200
100
Product
Catagory
Low Range
Standard
Tight Tolerance
Low Range
Low Range
MRC Applications:
The MRC1/2 will dissipate 1/2 watt at 70°C on a 1206 footprint, while the MRC 1 will dissipate 1 watt at 70°C on
a 2010 footprint. The MRC is recommended for applications where board real estate is a major concern. Due
to high power density and superior surge handling capability, it is also recommended as a direct replacement on
existing board designs where standard 1206 and 2010 resistors are marginal or failing.
Environmental Data
Characteristics
Temperature Coefficient
Thermal Shock
Low Temperature Operation
Short Time Overload
High Temperature Exposure
Maximum Change
As specified
±(0.5% + 0.01Ω)
±(0.25% + 0.01Ω)
±(1.0% + 0.01Ω)
±(0.5% + 0.01Ω)
Test Method
MIL-R-55342E Par 4.7.9 (-55°C + 125°C)
MIL-R-55342E Par 4.7.3 (-65°C + 150°C, 5 cycles)
MIL-R-55342E Par 4.7.4 (-65°C @ working voltage)
MIL-R-55342E Par 4.7.5
2.5 x
√
PxR for 5 seconds
MIL-R-55342E Par 4.7.6 (+150°C for 100 hours)
MIL-R-55342E Par 4.7.7
(Reflow soldered to board at 260°C for 10 seconds)
MIL-STD-202, Method 208 (245°C for 5 seconds)
MIL-R-55342E Par 4.7.8 (10 cycles, total 240 hours)
MIL-R-55342E Par 4.7.10 (2000 hours @ 70°C intermittent)
1200 gram push from underside of mounted chip
for 60 seconds
Chip mounted in center of 90mm long board, deflected 5mm
so as to exert pull on chip contacts for 10 seconds
Resistance to Bonding Exposure
±(0.25% + 0.01Ω)
Solderability
Moisture Resistance
Life Test
Terminal Adhesion Strength
Resistance to Board Bending
General Note
95% minimum coverage
±(0.5% + 0.01Ω)
±(1.0% + 0.01Ω)
±(1% + 0.01Ω)
no mechanical damage
±(1% + 0.01Ω)
no mechanical damage
IRC reserves the right to make changes in product specification without notice or liability.
All information is subject to IRC’s own data and is considered accurate at time of going to print.
© IRC Wirewound and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
A subsidiary of
TT electronics plc
MRC Series Issue June 2008 Sheet 1 of 2
Metal Glaze
™
High Power
Density Surface Mount
Power Resistor
Repetitive Surge Curve
1000
Peak Power (watts)
100
MRC 1
MRC 1/2
10
1
0.0001
0.001
0.01
0.1
1
Surge or Pulse Duration (seconds)
Note: Use for repetitive pulses where the average power dissipation
is not to exceed the component rating at 70°C. Surge handling capacity
for low-repetitive surges may be significantly greater than shown above.
Contact factory for recommendations.
Power Derating Curve
100
Ordering Data
Sample Part No.
MRC1/2 - 100 - 1000 - F - 13
IRC Type
(MRC 1/2 & MRC 1)
% Of Rated Power
60
Temperature Coefficient
50 ppm, 100 ppm, 200 ppm
Resistance Value
0
25
70
150
(100Ω and greater - First 3 significant figures plus 4th digit multiplier)
Example: 100Ω = 1000, 1000Ω = 1001, 150,000Ω = 1503
(Less than 100Ω - "R" is used to designate decimal)
Example: 51Ω = 51R0, 1Ω = 1R00, 0.25Ω = R250
Ambient Temperature (°C)
Tolerance
(C = 0.25%, D = 0.5%, F = 1.0%, G = 2.0%, J = 5.0%)
Packaging Code*
(BLK = Bulk, 7 = 7" Reel, 13 = 13" Reel)
© IRC Wirewound and Film Technologies Division
• 4222 South Staples Street • Corpus Christi Texas 78411 USA
Telephone: 361 992 7900 • Facsimile: 361 992 3377 • Website: www.irctt.com
MRC Series Issue June 2008 Sheet 2 of 2
FPGA/CPLD
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