Genesis Microchip Publication
PRELIMINARY DATA SHEET
gm5221-LF-BC
Integrated Multimedia LCD Controller
GENESIS MICROCHIP CONFIDENTIAL
Publication Number: C5221-DAT-04A
Publication Date: March 2004
Genesis Microchip Inc.
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gm5221-LF-BC Multimedia LCD Controller Preliminary Data Sheet
Table Of Contents
1
Overview........................................................................................................................................ 7
1.1 gm5221 System Design Example ................................................................................................ 7
1.2 gm5221 Features .......................................................................................................................... 8
2
3
4
gm5221 Pinout............................................................................................................................... 9
gm5221 Pin List........................................................................................................................... 10
Functional Description................................................................................................................. 15
4.1 Clock Generation ....................................................................................................................... 15
4.1.1 Using the Internal Oscillator with External Crystal............................................................ 15
4.1.2 Clock Synthesis................................................................................................................... 18
4.2 Chip Initialization ...................................................................................................................... 19
4.2.1 Hardware Reset................................................................................................................... 19
4.2.2 Power Sequencing............................................................................................................... 21
4.3 Analog to Digital Converter (ADC)........................................................................................... 21
4.3.1 ADC Pin Connection .......................................................................................................... 21
4.3.2 ADC Characteristics ........................................................................................................... 23
4.3.3 Clock Recovery Circuit ...................................................................................................... 23
4.3.4 Sampling Phase Adjustment ............................................................................................... 24
4.3.5 SOG and CSYNC support .................................................................................................. 24
4.4 Ultra-Reliable Digital Visual Interface Receiver (DVI Rx)....................................................... 25
4.4.1 DVI Receiver Characteristics ............................................................................................. 25
4.4.2 High-Bandwidth Digital Content Protection (HDCP) ........................................................ 26
4.5 ITU656 Video Input Port ........................................................................................................... 26
4.6 Test Pattern Generator (TPG) .................................................................................................... 26
4.7 Input Format Measurement........................................................................................................ 27
4.7.1 HSYNC / VSYNC Delay.................................................................................................... 27
4.7.2 Horizontal and Vertical Measurement ................................................................................ 28
4.7.3 Format Change Detection ................................................................................................... 28
4.7.4 Watchdog ............................................................................................................................ 28
4.7.5 Internal Odd/Even Field Detection (For Interlaced Inputs to ADC Only).......................... 28
4.7.6 Input Pixel Measurement .................................................................................................... 29
4.7.7 Image Phase Measurement ................................................................................................. 29
4.7.8 Image Boundary Detection ................................................................................................. 29
4.7.9 Image Auto Balance............................................................................................................ 29
4.8 Intelligent Image Processing™ Zoom/Shrink/Sharpening Filter............................................... 29
4.8.1 Variable Zoom Scaling ....................................................................................................... 29
C5221-DAT-04A
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Genesis Microchip Confidential
http://www.genesis-microchip.com
March 2004
gm5221-LF-BC Multimedia LCD Controller Preliminary Data Sheet
4.8.2 Horizontal and Vertical Shrink ........................................................................................... 30
4.8.3 Programmable Sharpening Filter ........................................................................................ 30
4.9 Advanced Digital Color Controls .............................................................................................. 30
4.9.1 Adaptive Contrast and Color (ACC)................................................................................... 30
4.9.2 Active Color Management–II (ACM-II) ............................................................................ 31
4.9.3 Gamma Look-Up-Table (LUT) .......................................................................................... 31
4.9.4 Color Standardization and sRGB Support .......................................................................... 31
4.9.5 Video Windowing............................................................................................................... 31
4.10 Display Output Interface.......................................................................................................... 31
4.10.1 Display Synchronization................................................................................................... 32
4.10.2 Display Timing Programming .......................................................................................... 32
4.10.3 Output Dithering ............................................................................................................... 33
4.10.4 Dual Four-Channel LVDS Transmitter ............................................................................ 33
4.10.5 Single Pixel TTL Output................................................................................................... 34
4.10.6 Panel Power Sequencing (PPWR, PBIAS) ....................................................................... 34
4.11 Energy Spectrum Management (ESM) .................................................................................... 35
4.12 On-Screen Display (OSD) ....................................................................................................... 35
4.12.1 On-Chip OSD SRAM ....................................................................................................... 35
4.12.2 Color Look-up Table (LUT) ............................................................................................. 36
4.13 On-Chip Microcontroller (OCM)............................................................................................. 36
4.13.1 Compiling firmware.......................................................................................................... 37
4.13.2 Embedded Bootstrap Function.......................................................................................... 37
4.13.3 In-System-Programming (ISP) of External FLASH ROM............................................... 38
4.13.4 UART Interface ................................................................................................................ 38
4.13.5 DDC2Bi Interface ............................................................................................................. 38
4.13.6 JTAG Interface ................................................................................................................. 39
4.13.7 General Purpose Inputs and Outputs (GPIO).................................................................... 39
4.13.8 Low-Bandwidth ADC (LBADC)...................................................................................... 40
4.13.9 Low Power State............................................................................................................... 40
4.13.10 Pulse Width Modulation (PWM) .................................................................................... 40
4.14 Bootstrap Configuration Pins................................................................................................... 41
4.15 Electrostatic Discharge (ESD) ................................................................................................. 41
5
Electrical Specifications .............................................................................................................. 42
5.1 Preliminary DC Characteristics ................................................................................................. 42
5.2 Preliminary AC Characteristics ................................................................................................. 44
6
7
Ordering Information................................................................................................................... 46
Mechanical Specifications ........................................................................................................... 47
C5221-DAT-04A
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Genesis Microchip Confidential
http://www.genesis-microchip.com
March 2004
gm5221-LF-BC Multimedia LCD Controller Preliminary Data Sheet
List Of Tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Analog Input Port................................................................................................................ 10
DVI Input Port .................................................................................................................... 10
RCLK PLL Pins.................................................................................................................. 11
Input Video Port.................................................................................................................. 11
System Interface.................................................................................................................. 12
LVDS Display Interface ..................................................................................................... 13
TTL Display Interface......................................................................................................... 13
RESET Time....................................................................................................................... 20
Requirement for RESETn due to Glitch in AVDD_3.3V................................................... 20
Pin Connection for RGB Input with HSYNC/VSYNC .................................................. 22
ADC Characteristics ....................................................................................................... 23
DVI Receiver Characteristics ......................................................................................... 25
Supported LVDS 24-bit Panel Data Mappings............................................................... 34
Supported LVDS 18-bit Panel Data Mapping ................................................................ 34
GPIO and Alternate Functions........................................................................................ 40
Bootstrap Signals ............................................................................................................ 41
Absolute Maximum Ratings ........................................................................................... 42
DC Characteristics .......................................................................................................... 43
Maximum Speed of Operation........................................................................................ 44
Input Timing for ITU656 Video Port ............................................................................. 44
OCM ROM Interface Timing ......................................................................................... 45
C5221-DAT-04A
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Genesis Microchip Confidential
http://www.genesis-microchip.com
March 2004