SM53201317UF6UU
March 30, 2000
Revision History
• March 30, 2000
Added Command Truth Table, Mode Register Table and notes.
Modified waveforms ( Auto Refresh (CBR) cycle and Power Down Mode and Clock Mask).
• July 22, 1998
Changes in physical dimensions.
• July 8, 1998
Changes in physical dimensions.
• May 5, 1998
Datasheet released.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
1
SM53201317UF6UU
March 30, 2000
4MByte (1M x 32) Synchronous DRAM Module - 1Mx16 based
100-pin DIMM, Unbuffered
Features
•
•
•
•
•
•
•
Standard
Configuration
Cycle Time
CAS# Latency
Burst Length
Burst Type
No. of Internal
Banks per SDRAM
• Operating Voltage
• Refresh
• Device Physicals
:
:
:
:
:
:
:
:
:
:
JEDEC
Non-ECC
10/12/15ns
1, 2 & 3 / 2 & 3
1, 2, 4, 8 or Page
Linear/Interleave
2
3.3V
2K/4K
400mil TSOP
•
•
•
•
Lead Finish
:
Gold
Length x Height
:
90.19mm x 25.40mm
No. of sides
:
Single-sided
Mating Connector (Examples)
Vertical
:
AMP-390070-6 (3.3V, Gold)
Functional Diagram
DQMB1
DQMB0
CS0#
CLK0
CKE0
RAS#
CAS#
WE#
BA0
DQMB2
DQMB3
CS2#
1Mx16
SDRAM
1Mx16
SDRAM
DQ0~DQ15
DQ16~DQ31
DQ0~DQ31
SA0~SA2
SCL
A0~A2
SCL
SDA
SERIAL PD
EEPROM
Notes
1.
2.
3.
:
A0~A9 and A10/AP to all SDRAMs.
Data is terminated using 10Ω series resistors.
CLK signals are terminated with 10Ω series resistors
and padding capacitors depending on load per clock.
SDA
V
CC
V
SS
Decoupling capacitors
to all devices.
( All specifications of this device are subject to change without notice.)
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
2
SM53201317UF6UU
March 30, 2000
Pin Name
A0~A10
A0~A7
BA0
DQ0~DQ31
CLK0, CLK1
RAS#
CAS#
CKE0
DQMB0~DQMB3
Row Addresses
Column Addresses
Bank Select Address
Data Inputs/Outputs
Clock Inputs
Row Address Strobe
Column Address Strobe
Clock Enable
DQ Mask Enables
CS0#, CS2#
WE#
SA0~SA2
SDA
SCL
V
CC
V
SS
NC
Chip Selects
Write Enable
Decode Inputs
Serial Data Input/Output
Serial Clock
Power Supply
Ground
No Connection
Note:
DQMs v/s Data I/Os
DQMB0 controls
DQMB1 controls
DQMB2 controls
DQMB3 controls
DQ0~DQ7
DQ8~DQ15
DQ16~DQ23
DQ24~DQ31
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin
Designation
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
DQMB0
V
SS
A0
A2
A4
A6
A8
A10/AP(Note*)
NC
NC
V
CC
NC
NC
NC
CLK0
Pin
No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Pin
Designation
V
SS
CKE0
WE#
CS0#
CS2#
V
CC
NC
NC
NC
NC
V
SS
DQMB2
DQ16
DQ17
DQ18
DQ19
V
CC
DQ20
DQ21
DQ22
DQ23
V
SS
SDA
SCL
V
CC
Pin
No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Pin
Designation
V
SS
DQ8
DQ9
DQ10
DQ11
V
CC
DQ12
DQ13
DQ14
DQ15
DQMB1
V
SS
A1
A3
A5
A7
A9
BA0
NC
NC
V
CC
RAS#
CAS#
NC
CLK1
Pin
No.
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Pin
Designation
V
SS
NC
NC
NC
NC
V
CC
NC
NC
NC
NC
V
SS
DQMB3
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
SA0
SA1
SA2
Note* : A10/AP initiates auto-precharge.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
3
SM53201317UF6UU
March 30, 2000
DC Characteristics
Absolute Maximum Ratings
Parameter
Voltage on any pin relative to V
SS
Power Dissipation
Operating Temperature
Storage Temperature
Short Circuit Output Current
Symbol
V
T
P
T
T
opr
T
stg
I
OS
Ratings
- 0.5 to +4.6
2
0 to +70
- 55 to +125
50
Unit
V
W
°C
°C
mA
Recommended DC Operating Conditions
(T
A
= 0 to +70°C)
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min
3.0
0
2.0
-0.3
Typ
3.3
0
-
-
Max
3.6
0
V
CC
+0.5
0.8
Unit
V
V
V
V
Capacitance
(V
CC
= 3.3V±0.3V, T
A
= +25°C)
Parameter
Input Capacitance (Addresses)
Input Capacitance (CLK, CKE, CAS#, RAS#, WE#)
Input Capacitance (CS#, DQMB)
Input/Output Capacitance (DQ0~DQ31)
Notes : Capacitance is sampled per Mil-Std-883.
Symbol
C
I1
C
I2
C
I3
C
I/O
Max
20
20
15
17
Unit
pF
pF
pF
pF
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
4
SM53201317UF6UU
March 30, 2000
DC Characteristics (cont’d)
(V
CC
= 3.3V±0.3V, V
SS
= 0V, T
A
= 0 to +70 °C)
Parameter
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Symbol
I
LI
I
LO
V
OH
V
OL
Test Conditions
0V
≤
V
in
≤
V
CC
+0.3V
0V
≤V
out
≤
V
CC
D
out
= Disable
High I
out
= -2mA
Low I
out
= 2mA
2.4
-
-
0.4
2.4
-
-
0.4
2.4
-
-
0.4
V
V
10ns
12ns
Min Max Min Max
-20
20
-20
20
-10
10
-10
10
15ns
Min Max
-20
20
-10
10
Unit
µA
µA
(V
CC
= 3.3V±0.3V, V
SS
= 0V, T
A
= 0 to +70
°C)
Parameter
Operating Current
Symbol
I
CC1
Test Conditions
Burst Length = 1, t
CLK
= min.
All Banks Active
CKE =V
IL
, t
CLK
= min.
All Banks Idle
CKE =V
IH
, t
CLK
= min.
All Banks Idle
CKE =V
IL
, t
CLK
= min.
Any Bank Active
CKE =V
IH
, t
CLK
= min.
Any Bank Active
t
CLK
= min.
t
CLK
= min., t
RC
= min.
Auto Refresh
CKE =V
IL
10ns
260
4
60
60
100
270
220
4
Max.
12ns
240
4
60
60
100
250
200
4
Unit Note
15ns
220
4
60
60
100
230
180
4
mA 1, 2, 3
mA 1, 2, 3
mA 1, 2 , 3
mA 1, 2, 3
mA 1, 2, 3
mA 1, 2, 3
mA 1, 2, 3
mA 1, 2, 3
Precharge Standby Current
I
CC2
Active Standby Current
I
CC3
Burst Mode Current
Refresh Current
Self Refresh Current
I
CC4
I
CC5
I
CC6
Notes:
1. I
CC
depends on output load condition when the device is selected. I
CC
(max) is specified at the output open condition.
2. An initial pulse of 200µs is required after power-up followed by a minimum of eight Auto-Refresh-Cycles.
3. All Currents are for 2K refresh SDRAMs.
C
orporate Headquarters:
P. O. Box 1757, Fremont, CA 94538, USA • Tel:(510) 623-1231 • Fax:(510) 623-1434 • E-mail: info@smartm.com
Europe:
36 Linford Forum, Rockingham Dr., Linford Wood, Milton Keynes, MK14 6LY, UK • Tel: +44-1908 234030 • Fax: +44-1908-234191
Asia/Pacific:
Plot 18, Lrg Jelawat 4, Kawasan Perindustrian Seberang Jaya 13700, Prai, Penang, Malaysia • Tel: +604-3992909 • Fax: +604-3992903
5
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