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LTC2266IUJ-14

产品描述14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs
文件大小439KB,共32页
制造商Linear ( ADI )
官网地址http://www.analog.com/cn/index.html
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LTC2266IUJ-14概述

14-Bit, 125Msps/105Msps/80Msps Low Power Dual ADCs

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Electrical Specifications Subject to Change
LTC2268-14/
LTC2267-14/LTC2266-14
14-Bit, 125Msps/105Msps/
80Msps Low Power Dual ADCs
FEATURES
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DESCRIPTION
The LTC
®
2268-14/LTC2267-14/LTC2266-14 are 2-channel,
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.4dB SNR and
88dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15ps
RMS
allows undersampling of IF frequencies with
excellent noise performance.
DC specs include
±1LSB
INL (typ),
±0.3LSB
DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2 LSB
RMS
.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode). The LVDS drivers have
optional internal termination and adjustable output levels
to ensure clean signal integrity.
The ENC
+
and ENC
inputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
2-Channel Simultaneous Sampling ADC
73.4dB SNR
88dB SFDR
Low Power: 299mW/243mW/203mW
Single 1.8V Supply
Serial LVDS Outputs: 1 or 2 Bits per Channel
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full Power Bandwidth S/H
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin Compatible 14-Bit and 12-Bit Versions
40-Pin (6mm
×
6mm) QFN Package
APPLICATIONS
n
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Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multichannel Data Acquisition
Nondestructive Testing
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V
V
DD
CH.1
ANALOG
INPUT
CH.2
ANALOG
INPUT
ENCODE
INPUT
14-BIT
ADC CORE
DATA
SERIALIZER
1.8V
OV
DD
OUT1A
AMPLITUDE (dBFS)
OUT1B
OUT2A
OUT2B
DATA
CLOCK
OUT
FRAME
GND
OGND
226814 TA01
LTC2268-14, 125Msps,
2-Tone FFT, f
IN
= 70MHz and 75MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
SERIALIZED
LVDS
OUTPUTS
S/H
S/H
14-BIT
ADC CORE
PLL
–90
–100
–110
–120
0
10
20
30
40
FREQUENCY (MHz)
50
60
226814
TA01b
22687614p
1

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