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Table of Contents
Application Report
Hermetic Package Reflow Profiles, Termination
Finishes, and Lead Trim and Form
ABSTRACT
Hermetic microcircuits are still widely used in mission-critical aerospace, defense, and industrial applications.
Customers occasionally have questions regarding board-level assembly of these packages. A general set of
guidelines are addressed in this application note.
Table of Contents
1 Reflow Profiles........................................................................................................................................................................2
2 Critical Considerations for Gold-Plated Termination-Finishes..........................................................................................
3
3 Considerations for Leadless Ceramic Chip Carrier Packages...........................................................................................3
4 Lead Forming..........................................................................................................................................................................
4
5 Ceramic Packaging.................................................................................................................................................................4
6 References..............................................................................................................................................................................
5
List of Figures
Figure 1-1. Starting Profile for Typical Pb/Sn Solder Paste.........................................................................................................
2
List of Tables
Table 2-1. MIL-PRF-38535 TABLE A-III Composition and Coating Thickness Requirements.....................................................3
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Reflow Profiles
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1 Reflow Profiles
Board-level solder reflow profiles are dependent on numerous factors including, but not limited to, solder type,
flux, package type, the number of components, the number of board layers, the board size, reflow oven type,
and accuracy as well as pre- and post-cleaning processes. Because of the number of variables it is not possible
to provide a single reflow profile that is representative of every board using a specific package type. Typically,
manufacturing houses have reflow profiles in place and modify them for specific hardware.
TI suggests using the flux manufacturer’s recommended profile as a starting point. Variations of course need to
be comprehended based on the time required to volatize the flux prior to the solder reaching liquidus. In general,
ceramic parts are compatible with ramp-up rates of < 3°C/s and ramp-down rates of < 6°C/s with a maximum
peak temperature of 260°C.
A hermetic package will withstand three passes of reflow if the peak temperature and ramp rates are not
exceeded.
Most metal lid packages use an 80%Au-20%Sn solder preform to attach the lid. Gold-tin solder will begin to
soften at 270°C and has a eutectic point of 280°C. The package body temperature must not exceed 260°C at
any time or the hermetic seal of the package will be damaged. Note that through-hole hermetic devices specify a
maximum temperature for soldering as a lead-temperature of 300°C for 10 seconds. This is not a reflow
temperature.
Peak Temperature
235°C Max < 10 s
235
Temperature (C° )
200
Ramp rate critical to
solder paste volatiles
160
140
90 +/- 30 s
45 to 90 s
Above 183°C
1-3°C/s
0
50
100
Duration (s)
150
200
250
Figure 1-1. Starting Profile for Typical Pb/Sn Solder Paste
2
Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and
Form
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Critical Considerations for Gold-Plated Termination-Finishes
2 Critical Considerations for Gold-Plated Termination-Finishes
TI offers a variety of termination finishes for compliant hermetic packages, for example:
•
•
•
Alloy-42 leads with Sn63Pb37 hot solder dip.
Alloy-42 or Kovar leads with 50µ-in to 350 µ-in of nickel underplate and 60 µ-in to 225 µ-in of gold finish plate
Alloy-42 or Kovar leads with 50µ-in to 350 µ-in of nickel underplate and SN63Pb37 hot solder dip
Table 2-1. MIL-PRF-38535 TABLE A-III Composition and Coating Thickness Requirements
Coating
Hot solder dip (for all round leads)
Hot solder dip (for all shapes other than round leads which
have ≤ 25 mil pitch)
Hot solder dip (for all shapes other than round leads with > 25
mil pitch)
Tin-lead plate (as plated)
Tin-lead plate (fused)
Gold plate
Nickel plate (electroplate)
Nickel plate (electroless)
Nickel cladding
Minimum
60 µ-in
150 µ-in
Maximum
Not Specified
Not Specified
200 µ-in
Not Specified
300 µ-in
200 µ-in
50 µ-in
50 µ-in
50 µ-in
50 µ-in
Not Specified
Not Specified
225 µ-in
350 µ-in
250 µ-in
350 µ-in
The electronics industry currently recognizes a threshold level of 3% gold by weight that can be dissolved into
eutectic tin-lead solder above which the solder-joint may exhibit gold embrittlement.
With the specified gold thickness it is recommended that gold-plated leads be pre-tinned (solder-dipped) before
board mounting to scavenge the gold from the leads. If this is not done, there is a chance of gold-embrittlement
of the board-level solder-joints. A flowing solder-pot or two passes in a static solder-pot is recommended. Solder-
pot solder composition should be periodically monitored for gold content.
3 Considerations for Leadless Ceramic Chip Carrier Packages
The critical items for board-level solder process for a Leadless Ceramic Chip Carrier (LCCC) package are solder
paste thickness and depth of package insertion into the paste during pick and place.
•
•
•
•
•
•
•
•
•
If the paste under the package is too thin it will result in a poor solder joint.
Too much solder paste can cause excess solder on the sides of the package.
If the package is placed too far into the paste (too close to the board) it can cause excess solder on the sides
of the package.
The solder should adhere to the pads on the package backside and flow up the castellation.
The package should be parallel to the board (no tilt).
The package needs to be aligned to the pads.
The circuit board pads should be sized to fit the pads on the underside of the package and allow for a fillet on
the sides.
Placement depth should be consistent.
With mixed package types on the board the actual reflow temperature of the LCCC component should be
measured (thermocouple on package via thermally conductive epoxy).
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Lead Forming
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4 Lead Forming
Hermetic surface mount packages are typically sold non-formed as most customers have a preferred final form
factor which can vary from customer to customer. Some use the default form factor available from third party
service providers such as Fancort or Corfin. For reference, Fancort maintains a library of form factors on their
website at
Standard SMT Footprints.
Fancort can also provide a lead-forming service or sell the fixtures for a
customer to form in house. General information is found at
Lead Forming Services.
TI does not endorse or
recommend these companies but only mentions them as example service providers.
For more information, contact TI Support at
www.ti.com/support.
5 Ceramic Packaging
The following table is a snapshot for reference purposes and may not be current. For package specific
information and application notes, see
http://www.ti.com/support-packaging/packaging-information.html.
Package Group
CBGA
CCGA
CDBGA
Description
Ceramic Ball Grid Array
Ceramic Column Grid Array
Ceramic Dimpled Ball Grid Array
Designator
GJN,GLE,GLG,GLK,GNM
NAA,NWE
GFP,GGP,GGR,GGZ,GHF,GHM,GJM,GKG,ZGR,
ZHM
CDIP
Ceramic Dual Inline Package
J,JG,JL,JNA,JNC,JND,JT,JTA,JTB,JTC,NAB,NAY,
NAZ,NFE
CDIP-BB
Ceramic Dual Inline Package – Bottom
Braze
Ceramic Dual Inline Package – Side Braze
JDE,JDG
CDIP-SB
JC,JD,JDC,JDD,JDJ,JDK,JDM,JDN,JN,JVA,JVB,
JVD,JVE,JVF,NAK
CFCBGA
Ceramic Flip Chip Ball Grid Array
AAD,CDZ,CMA,CME,CMQ,CTF,CTJ,CTK,CUB,
CUD,CUM,CYC,GDZ,GLL,GLP,GMA,GME,
GTF,GTH,GTJ,GTK,GTQ,GUD,GUE,GUF,GUM,
ZDZ,ZUF
CFP
Ceramic Flat Pack
FAA,HAJ,HAY,HBC,HBD,HBE,HBU,HBY,HD,HE,HF,HFD,HFG,HF
H,HFL,HFN,HFP,HFQ,
HFR,HFS,HG,HGA,HGF,HH,HKB,HKC,HKD,HKE,HKH,HKJ,HKK,
HKN,HKP,HKQ,HKR,HKS,
HKT,HKU,HKV,HKW,HKX,HKY,HR,HT,HV,HY,
HZ,NAD,PHF,PHG,U,W,WA,WD,WH,WJ,WN
CFP
CLGA
CPGA
CQFP
CTO-92
CZIP
JLCC
Ceramic Flat Pack - Gullwing Formed Leads NAC
Ceramic Land Grid Array
Ceramic Pin Grid Array
Ceramic Quad Flat Pack
Ceramic Transistor Outline 92
Ceramic Zig-Zag Inline Package
J Lead Ceramic Chip Carrier
FVA, NAF,ZMA,ZMX
GA,GB,GC,GE,GF,GFA,NAQ,NAR,NAT
NAU,NBA,NBB,NBC
HTA
SV
FJ,FZ,HJ,HJA
4
Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and
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Package Group
LCCC
Description
Leadless Ceramic Chip Carrier
Designator
FD,FE,FFA,FFC,FFD,FFE,FFF,FFH,FFJ,FFK,FK,
FKH,FNC,FPH,FPM,FQ,HL,HM,NAJ
TO-CAN
Transistor Outline [Metal] Can
K,LMC,LMD,LME,LMF,LMG,NDS,NDT,NDU,
NDV,NEP,NEQ,NER
References
6 References
•
•
MIL-PRF-38535
General Specification for Integrated Circuits (Microcircuits) Manufacturing
MIL-STD-883
Test Methods and Procedures for Microcircuits
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