SSFP4N90
StarMOS
T
Power MOSFET
■
■
Extremely high dv/dt capability
Low Gate Charge Qg results in
Simple Drive Requirement
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatability
V
DSS
= 900V
I
D25
= 4A
R
DS(ON)
= 4.2Ω
■
■
■
■
Description
StarMOS is a new generation of high voltage
N–Channel enhancement mode power MOSFETs.
This new technology minimises the JFET effect,
increases packing density and reduces the
on-resistance. StarMOS also achieves faster
switching speeds through optimised gate layout
with planar stripe DMOS technology.
Pin1–Gate
Pin2–Drain
Pin1–Source
Application
■
Switching application
Absolute Maximum Ratings
Parameter
I
D
@Tc=25ْ C
I
D
@Tc=100ْC
I
DM
P
D
@T
C
=25ْC
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current,V
GS
@10V
Continuous Drain Current,V
GS
@10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
①
①
③
②
①
Max.
4
2.3
16
140
1.12
±30
170
2.2
8.5
4.0
–55
to +150
300(1.6mm from case)
10 Ibf in(1.1N m)
●
●
Units
A
W
W/ْ C
V
mJ
A
mJ
V/ns
ْ
C
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque,6-32 or M3 screw
Thermal Resistance
Parameter
R
θJC
R
θCS
R
θJA
Junction-to-case
Case-to-Sink,Flat,Greased Surface
Junction-to-Ambient
Min.
—
—
—
Typ.
—
0.5
—
Max.
0.89
－
62.5
ْ
C/W
Units
1
SSFP4N90
StarMOS
T
Power MOSFET
Electrical Characteristics @T
J
=25
ْ
C(unless otherwise specified)
Parameter
V
(BR)DSS
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
tr
t
d(off)
t
f
L
D
Drain-to-Source Breakdown Voltage
Static Drain-to-Source On-resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage current
Gate-to-Source Forward leakage
Gate-to-Source Reverse leakage
Total Gate Charge
Gate-to-Source charge
Gate-to-Drain("Miller") charge
Turn-on Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
△
V
(BR)DSS
/
△
T
J
Breakdown Voltage Temp.Coefficient
Min.
900
—
—
3.0
－
—
—
—
—
—
—
—
—
—
—
—
—
Typ.
—
1.05
3.5
—
2.0
—
—
—
—
17
4.5
7.5
25
50
40
35
4.5
Max. Units
—
—
4.2
5.0
—
10
100
100
-100
22
－
－
60
110
90
80
—
V
Test Conditions
V
GS
=0V,I
D
=
250μA
④
V/ْC Reference to 25ْC,I
D
=250μA
Ω
V
GS
=10V,I
D
=2A
V
S
μA
nA
V
DS
=50V,I
D
=2A
V
DS
=900V,V
GS
=0V
V
DS
=720V,V
GS
=0V,T
J
=125ْC
V
GS
=30V
V
GS
=-30V
V
DS
=V
GS
,I
D
=250μA
I
D
=4A
nC V
DS
=720V
V
GS
=10V See Fig.6 and 13
④
V
DD
=450V
I
D
=4A
nS
R
G
=25Ω
Between lead,
6mm(0.25in.)
nH from package
and center of
die contact
V
GS
=0V
pF V
DS
=25V
f
=1.0MH
Z
See Figure 5
L
S
C
iss
C
oss
C
rss
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
—
7.5
740
65
5.6
—
960
85
7.3
Source-Drain Ratings and Characteristics
Parameter
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
①
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-on Time
.
.
Min.
—
—
—
—
—
Typ.
—
—
—
450
3.5
Max.
4
A
16
1.4
－
V
nS
nC
Units
Test Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
=25ْC,I
S
=4A,V
GS
=0V
④
T
J
=25ْC,I
S
=4A
di/dt=100A/μs
④
－
Intrinsic turn-on time is negligible (turn-on is dominated by Ls + L
D
)
Notes:
①
Repetitive rating;pulse width limited by
max.junction temperature(see figure 11)
③
I
SD
≤4A,di/dt≤200A/μS,V
DD
≤V
(BR)DSS
,
TJ≤25ْ C
④
Pulse width≤300μS; duty cycle≤2%
②
L = 67mH, IAS = 4A, VDD = 50V,
RG = 25Ω, Starting TJ = 25°C
2
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