Primary Side PWM Controller
Preliminary Specification
Features
Description
The AS2208 is a simplified pulse width modulation control-
ler, offering similar functionality as that of the AS3842.
Based on the AS2214, the AS2208 provides the additional
features of low startup current and overvoltage latching,
making it a good solution for adapter applications.
The PWM function is controlled by the current sense com-
parator for normal current mode control. The COMP pin,
which serves as an input to the current sense comparator,
provides a 1 mA current source which can be tied directly to
the control loop optocoupler. The output stage is a high
current totem pole output that sees only 85 ns delay from the
PWM comparator.
The AS2208 requires only 100
µA
of startup current. The
undervoltage lockout (UVLO) thresholds are nominally 14V
for turn on and 8 V for turn off. The VREG pin, based on a
trimmed bandgap reference, provides a temperature com-
pensated 5 V to loads of up to 50 mA. The oscillator
discharge current is trimmed to provide guaranteed duty
cycle clamping.
Top view
AS2208
•
•
•
•
•
•
•
Low Startup Current
Single-start or auto-restart
modes
Oscillator trimmed for precision
duty cycle clamp
Standard temperature range
extended to 105°C
Remote on / off control
Self limiting supply Voltage
Standard current mode control
Pin Configuration
—
PDIP (N)
COMP
ISNS
RT/CT
OV
1
2
3
4
8L SOIC (D)
8
7
6
5
VREG
VCC
OUT
GND
COMP
ISNS
RT/CT
OV
1
2
3
4
8
7
6
5
VREG
VCC
OUT
GND
Ordering Information
Package
Temperature Range
Order Code
8-Pin Plastic DIP
8-Pin Plastic SOIC
0 to 105° C
0 to 105° C
AS2208N
AS2208D
ASTEC Semiconductor
77
AS2208
Functional Block Diagram
Primary Side PWM Controller
V
CC
5V enable
5V Reg.
V
REG
V
REG
S
R
ENBL
Q
UVLO
ENBL
S
Q
V
REG
R
Latch Enable
2V5
OV
3V9
S
R
1V7
ISNS
V
CC
1mA
COMP
2R
ENBL
Q
Fault Latch
VOV Latch
(FAULT)
CM PWM
V
CC
(PWM)
1V
R
OUT
RT/CT
OSC
(BLANK)
GND
ASTEC Semiconductor
78
Primary Side PWM Controller
Pin Function Description
Pin Number
Function
Description
AS2208
1
COMP
This is the inverting input to the PWM comparator. A divided and level shifted
representation of this voltage is compared to the ISNS input to determine OUT duty
cycle. A 1 mA current source is provided as a pull-up for an optocoupler.
A voltage proportional to inductor current is connected to this pin. The PWM uses this
information to terminate the gate drive of the output.
Oscillator frequency and maximum duty cycle are set by connecting a resistor (R
T
) to
VREG and a capacitor (C
T
) to ground.
This pin latches OUT low when pulled above 2.5 V. The latch can be reset by pulling
OV above 4 V then back to ground.
Circuit common ground.
This totem pole output is designed to directly drive a power MOSFET switch capable of
sourcing and sinking peak currents up to 1 A.
Positive supply voltage for the IC.
Output of 5V series regulator.
2
3
4
5
6
7
8
ISNS
RT/CT
OV
GND
OUT
V
CC
V
REG
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage (I
CC
< 30 mA)
Supply Voltage (Low Impedance Source)
Reference Current
Output Current
Output Voltage
Continuous Power Dissipation at 25° C
Junction Temperature
Storage Temperature Range
Lead Temperature, Soldering 10 Seconds
V
CC
V
CC
I
REF
I
OUT
V
OUT
P
D
T
J
T
STG
T
L
Self-Limiting
20
200
1
20
500
150
– 65 to 150
300
V
V
mA
A
V
mW
°C
°C
°C
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Conditions
Parameter
Supply Voltage
Oscillator
Symbol
V
CC
F
OSC
Rating
10 - 15
50 - 250
Unit
V
kHz
Typical Thermal Resistance
Package
8L PDIP
8L SOIC
θ
JA
95° C/W
175° C/W
θ
JC
50° C/W
45° C/W
Typical Derating
10.5 mW/°C
5.7 mW/°C
ASTEC Semiconductor
79
AS2208
Electrical Characteristics
Primary Side PWM Controller
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V
CC
= 15 V;
BOK = 3 V; OV = 0V; R
T
= 680
Ω;
C
T
= 10 nF. To override UVLO, V
CC
should be raised above 18 V prior to test.
Parameter
5 V Regulator
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
Total Output Variation
Long-Term Stability
Output Noise Voltage
Maximum Source Current
Oscillator
Initial Accuracy
Voltage Stability
Temperature Stability
Amplitude
Upper Trip Point
Lower Trip Point
Discharge Current
Duty cycle Limit
Over-Temperature Shutdown
Current Sense Comparator
Transfer Gain
ISNS Level Shift
Maximum Input Signal
Input Bias Current
COMP Source Current
COMP Swing High
Power Supply Rejection Ratio
Propagation Delay to Output
AV
ISNS
Symbol
Test Condition
Min
Typ
Max
Unit
V
REG
PSRR
I
REG
= 1 mA, T
J
= 25° C
9
≤
V
CC
≤
18 V
1≤ I
REG
≤
20mA
4.90
5.00
5
5
0.2
5.10
15
15
0.4
5.15
V
mV
mV
mV/°C
V
mV
µV
TC
REG
Line, Load,Temperature
Over 1,000 hrs at 25°C
V
NOISE
I
MAX
10
≤
f
≤
100kHz, T
J
= 25°C
V
REG
= 4.8 V
30
4.85
5
50
120
25
180
mA
F
OSC
T
J
=25°C
9
≤
V
CC
≤
18 V
108
120
0.2
5
1.55
2.80
1.25
132
1
kHz
%
%
V
V
V
TC
F
V
OSC
V
H
V
L
I
DSC
T
MIN
≤
T
J
≤
T
MAX
V
RT/CT
peak-to-peak
7.50
R
T
=680
Ω,
C
T
=10nF, T
J
=25°C
46
8.70
50
140
9.50
55
mA
%
°C
T
OT
-0.2
≤
V
ISNS
≤
0.8 V
V
ISNS
= 0 V
V
COMP
=+5 V
V
COMP
=+5 V
V
COMP
=+5 V
2.85
3.00
1.50
3.15
V/V
V
V
LS
V
ISNS MAX
I
BIAS
ISNS
1.00
1.08
-1
1.20
-10
V
µA
mA
V
dB
I
COMPH
V
COMPH
PSRR
t
PB
0.6
5.2
1.0
5.6
70
85
150
9
≤
V
CC
≤
18 V
ns
ASTEC Semiconductor
80
Primary Side PWM Controller
Electrical Characteristics
(cont’d)
AS2208
Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated
based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are V
CC
= 15 V;
BOK = 3 V; OV = 0V; R
T
= 680
Ω;
C
T
= 10 nF. To override UVLO, V
CC
should be raised above 18 V prior to test.
Parameter
Output
Output Low Level
Output Low Level
Output High Level
Output High Level
Rise Time
Fall Time
Maximum Duty Cycle
Minimum Duty Cycle
Over-Voltage Input
OV Threshold
OV Reset Threshold
OV Clear Threshold
OV Bias Current
Under Voltage Lockout
Startup Threshold
Minimum Operating Voltage
after Turn-on
Startup Current
Operating Supply Current
Supply Voltage Clamp
Output Impedance to GND in
UVLO State
V
CC
(ON)
V
CC
(OFF)
I
CC
I
CC
V
CC
Zener
Z
OUT
I
CC
= 30 mA
V
CC
= 6 V
V
CC
= 13 V
12.5
7.3
14.0
8.0
105
12
18
22.0
15.8
8.5
150
20
V
AV
µA
mA
V
kΩ
V
OV
V
VOVH
V
VOVL
I
BIAS OV
V
REG
= 5 V, V
OV
≤
OV Threshold
2.50
3.80
1.10
-1
2.80
4.00
1.75
-0.2
3.10
4.50
2.20
1
V
V
V
µA
V
OL
V
OL
V
OH
V
OH
t
R
t
F
D
MAX
D
MIN
I
SINK
= 20 mA
I
SINK
= 150 mA
I
SOURCE
= 20 mA
I
SOURCE
= 150 mA
C
L
= 1 nF
C
L
= 1 nF
94
0
13
12
0.1
1.5
13.5
13
50
50
97
150
150
100
0.4
2.2
V
V
V
V
ns
ns
%
%
Symbol
Test Condition
Min
Typ
Max
Unit
ASTEC reserves the right to make changes without further notice to any products described herein to improve reliability, function, or
design. ASTEC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does
it convey any license under its patent rights or the rights of others. ASTEC products are not authorized for use as components in life
support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify
ASTEC of any such intended end use whereupon ASTEC will determine availability and suitability of its products for the intended use.
ASTEC and the ASTEC logo are trademarks of ASTEC (BSR) PLC.
ASTEC SEMICONDUCTOR
255 Sinclair Frontage Road
•
Milpitas, California 95035
•
Tel. (408) 263-8300
•
FAX (408) 263-8340
ASTEC Semiconductor
81
分立器件
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